diff options
author | Erik Hallnor <ehallnor@umich.edu> | 2004-03-04 14:57:57 -0500 |
---|---|---|
committer | Erik Hallnor <ehallnor@umich.edu> | 2004-03-04 14:57:57 -0500 |
commit | 7c089b2001afb93fe51b1a89456b15fd0d00c794 (patch) | |
tree | c5186e7fec84e54a093337fc96e72400a0faf6b5 /cpu/simple_cpu/simple_cpu.cc | |
parent | cfb6f8fd01e19dbd0b3ce5cfa28d6f78f617e954 (diff) | |
download | gem5-7c089b2001afb93fe51b1a89456b15fd0d00c794.tar.xz |
Copy implementations
arch/alpha/isa_desc:
Need to return fault for copy operations.
cpu/exec_context.hh:
Add temporary storage to pass source address from copy load to copy store
cpu/simple_cpu/simple_cpu.cc:
Implement copy functions.
cpu/simple_cpu/simple_cpu.hh:
Return fault
--HG--
extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90
Diffstat (limited to 'cpu/simple_cpu/simple_cpu.cc')
-rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 721861dd5..2553bd22a 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -327,6 +327,46 @@ change_thread_state(int thread_number, int activate, int priority) { } +Fault +SimpleCPU::copySrcTranslate(Addr src) +{ + memReq->reset(src, (dcacheInterface) ? + dcacheInterface->getBlockSize() + : 64); + + // translate to physical address + Fault fault = xc->translateDataReadReq(memReq); + + if (fault == No_Fault) { + xc->copySrcAddr = src; + xc->copySrcPhysAddr = memReq->paddr; + } else { + xc->copySrcAddr = 0; + xc->copySrcPhysAddr = 0; + } + return fault; +} + +Fault +SimpleCPU::copy(Addr dest) +{ + int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64; + uint8_t data[blk_size]; + assert(xc->copySrcPhysAddr); + memReq->reset(dest, blk_size); + // translate to physical address + Fault fault = xc->translateDataWriteReq(memReq); + if (fault == No_Fault) { + Addr dest_addr = memReq->paddr; + // Need to read straight from memory since we have more than 8 bytes. + memReq->paddr = xc->copySrcPhysAddr; + xc->mem->read(memReq, data); + memReq->paddr = dest_addr; + xc->mem->write(memReq, data); + } + return fault; +} + // precise architected memory state accessor macros template <class T> Fault |