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author | Nathan Binkert <binkertn@umich.edu> | 2004-05-21 13:58:39 -0400 |
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committer | Nathan Binkert <binkertn@umich.edu> | 2004-05-21 13:58:39 -0400 |
commit | f622d74f81f6d0c451bc8437d19a38057bc0d164 (patch) | |
tree | db725b6d157ec55ee18c584dc1b5e81b10a5043c /cpu/simple_cpu/simple_cpu.cc | |
parent | fee1e1ec0a9c1122f3c42fdef9482c64389949fc (diff) | |
download | gem5-f622d74f81f6d0c451bc8437d19a38057bc0d164.tar.xz |
add a few statistics events
arch/alpha/ev5.cc:
Add an event for faults
cpu/simple_cpu/simple_cpu.cc:
add events for uncached reads/writes
--HG--
extra : convert_revision : 747bdf12761e2de6ebbf54fecc9e0b71915b3a02
Diffstat (limited to 'cpu/simple_cpu/simple_cpu.cc')
-rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 765507345..1ade235ed 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -42,6 +42,7 @@ #include "base/pollevent.hh" #include "base/range.hh" #include "base/trace.hh" +#include "base/stats/events.hh" #include "cpu/base_cpu.hh" #include "cpu/exec_context.hh" #include "cpu/exetrace.hh" @@ -402,6 +403,9 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags) } } + if (!dcacheInterface && (memReq->flags & UNCACHEABLE)) + Stats::recordEvent("Uncached Read"); + return fault; } @@ -487,6 +491,9 @@ SimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) if (res && (fault == No_Fault)) *res = memReq->result; + if (!dcacheInterface && (memReq->flags & UNCACHEABLE)) + Stats::recordEvent("Uncached Write"); + return fault; } |