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authorSteve Reinhardt <stever@eecs.umich.edu>2003-10-29 13:35:07 -0800
committerSteve Reinhardt <stever@eecs.umich.edu>2003-10-29 13:35:07 -0800
commitaf5277a6784ed6a8e4671dfa79b1346bed687ae1 (patch)
tree81d91d5bc7287b146a0b0ee796ae3b8acb7fbbcf /cpu/simple_cpu/simple_cpu.cc
parent8da9fcdd751bcb74c17e72d7d0a6c7ccf259552c (diff)
downloadgem5-af5277a6784ed6a8e4671dfa79b1346bed687ae1.tar.xz
Serialization support for Alpha TLBs, PhysicalMemory, and SimpleCPU.
arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: Serialize TLB contents. cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: Complete serialization of SimpleCPU (including owned events). sim/eventq.cc: sim/eventq.hh: Basic serialization for events. Still need to handle dynamic events (not owned by a SimObject). sim/serialize.cc: sim/serialize.hh: Export serialization filename so PhysicalMemory can derive its filename from that. --HG-- extra : convert_revision : 4db851c5880f73f576ca092d5e5ad4256048eb51
Diffstat (limited to 'cpu/simple_cpu/simple_cpu.cc')
-rw-r--r--cpu/simple_cpu/simple_cpu.cc41
1 files changed, 33 insertions, 8 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index 27576d558..3179b7b1f 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -75,8 +75,26 @@
using namespace std;
+SimpleCPU::TickEvent::TickEvent(SimpleCPU *c)
+ : Event(&mainEventQueue, "SimpleCPU::TickEvent", 100), cpu(c)
+{
+}
+
+void
+SimpleCPU::TickEvent::process()
+{
+ cpu->tick();
+}
+
+const char *
+SimpleCPU::TickEvent::description()
+{
+ return "SimpleCPU tick event";
+}
+
+
SimpleCPU::CacheCompletionEvent::CacheCompletionEvent(SimpleCPU *_cpu)
- : Event(&mainEventQueue),
+ : Event(&mainEventQueue, "SimpleCPU::CacheCompletionEvent"),
cpu(_cpu)
{
}
@@ -89,7 +107,7 @@ void SimpleCPU::CacheCompletionEvent::process()
const char *
SimpleCPU::CacheCompletionEvent::description()
{
- return "cache completion event";
+ return "SimpleCPU cache completion event";
}
#ifdef FULL_SYSTEM
@@ -242,17 +260,24 @@ SimpleCPU::regStats()
void
SimpleCPU::serialize(ostream &os)
{
+ SERIALIZE_ENUM(_status);
+ SERIALIZE_SCALAR(inst);
xc->serialize(os);
+ nameOut(os, csprintf("%s.tickEvent", name()));
+ tickEvent.serialize(os);
+ nameOut(os, csprintf("%s.cacheCompletionEvent", name()));
+ cacheCompletionEvent.serialize(os);
}
void
-SimpleCPU::unserialize(const IniFile *db, const string &category)
+SimpleCPU::unserialize(const IniFile *db, const string &section)
{
- xc->unserialize(db, category);
-
- // Read in Special registers
-
- // CPUTraitsType::unserializeSpecialRegs(db,category,node,xc->regs);
+ UNSERIALIZE_ENUM(_status);
+ UNSERIALIZE_SCALAR(inst);
+ xc->unserialize(db, section);
+ tickEvent.unserialize(db, csprintf("%s.tickEvent", name()));
+ cacheCompletionEvent
+ .unserialize(db, csprintf("%s.cacheCompletionEvent", name()));
}
void