Initial support for CPU switching. New SamplingCPU object encompasses a set

of CPUs that get switched round-robin (though currently we're only shooting for
two CPUs and one switch event, and even that doesn't quite work yet).  Registration
of ExecContexts with System/Process object factored out so we can create two CPUs
but only register one of them at a time.  Also worked at making behavior and naming
in System and Process objects more consistent.

arch/alpha/ev5.cc:
    Rename ipr_init to initIPRs and get rid of unused mem arg.
arch/alpha/fake_syscall.cc:
    Process:numCpus is now a function (not a data member).
base/remote_gdb.hh:
    Support for ExecContext switching.
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
    Support for ExecContext switching.
    Renamed contexts array to execContexts to be consistent with Process.
    CPU ID now auto-assigned by system object.
cpu/simple_cpu/simple_cpu.cc:
    Support for ExecContext switching.
    Renamed contexts array to execContexts to be consistent with Process.
    CPU ID now auto-assigned by system object.
    Cleaned up MP full-system initialization a bit.
dev/alpha_console.cc:
    Renamed xcvec array to execContexts to be consistent with Process.
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
    Support for ExecContext switching.
    CPU ID now auto-assigned by system object.
sim/prog.cc:
sim/prog.hh:
    Support for ExecContext switching.
    Process:numCpus is now a function (not a data member).
sim/system.cc:
sim/system.hh:
    Support for ExecContext switching.
    Renamed xcvec array to execContexts to be consistent with Process.

--HG--
extra : convert_revision : 79649cffad5bf3e83de8df44236941907926d791

1 files changed, 13 insertions, 2 deletions

diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh
index fd50acfe1..e1b351cab 100644
--- a/cpu/simple_cpu/simple_cpu.hh
+++ b/cpu/simple_cpu/simple_cpu.hh
@@ -92,7 +92,8 @@ class SimpleCPU : public BaseCPU
         Idle,
         IcacheMissStall,
         IcacheMissComplete,
-        DcacheMissStall
+        DcacheMissStall,
+        SwitchedOut
     };
 
   private:
@@ -117,7 +118,7 @@ class SimpleCPU : public BaseCPU
               Counter max_loads_any_thread, Counter max_loads_all_threads,
               AlphaItb *itb, AlphaDtb *dtb, FunctionalMemory *mem,
               MemInterface *icache_interface, MemInterface *dcache_interface,
-              int cpu_id, Tick freq);
+              Tick freq);
 
 #else
 
@@ -135,6 +136,11 @@ class SimpleCPU : public BaseCPU
     // execution context
     ExecContext *xc;
 
+    void registerExecContexts();
+
+    void switchOut();
+    void takeOverFrom(BaseCPU *oldCPU);
+
 #ifdef FULL_SYSTEM
     Addr dbg_vtophys(Addr addr);
 
@@ -171,6 +177,7 @@ class SimpleCPU : public BaseCPU
     CacheCompletionEvent cacheCompletionEvent;
 
     Status status() const { return _status; }
+
     virtual void execCtxStatusChg() {
         if (xc) {
             if (xc->status() == ExecContext::Active)
@@ -182,6 +189,10 @@ class SimpleCPU : public BaseCPU
 
     void setStatus(Status new_status) {
         Status old_status = status();
+
+        // We should never even get here if the CPU has been switched out.
+        assert(old_status != SwitchedOut);
+
         _status = new_status;
 
         switch (status()) {