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author | Ron Dreslinski <rdreslin@umich.edu> | 2005-03-07 10:58:15 -0500 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2005-03-07 10:58:15 -0500 |
commit | b290ecf1bb0d3d65f4f2ddd72e0273a203d36243 (patch) | |
tree | 808819330f22050ea78351df14a3a741c33e5f37 /cpu/simple_cpu | |
parent | 45eb26e67c4be623dd0cb0b660caa1200f729d42 (diff) | |
parent | e5f945967b2d49f3c14384be947a12dbf02260da (diff) | |
download | gem5-b290ecf1bb0d3d65f4f2ddd72e0273a203d36243.tar.xz |
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
extra : convert_revision : 2b73bffea88cb0e3bb5dff232a15afea8498f4e3
Diffstat (limited to 'cpu/simple_cpu')
-rw-r--r-- | cpu/simple_cpu/simple_cpu.hh | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 425b86ee5..f245a7bba 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -268,47 +268,47 @@ class SimpleCPU : public BaseCPU // storage (which is pretty hard to imagine they would have reason // to do). - uint64_t readIntReg(StaticInst<TheISA> *si, int idx) + uint64_t readIntReg(const StaticInst<TheISA> *si, int idx) { return xc->readIntReg(si->srcRegIdx(idx)); } - float readFloatRegSingle(StaticInst<TheISA> *si, int idx) + float readFloatRegSingle(const StaticInst<TheISA> *si, int idx) { int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; return xc->readFloatRegSingle(reg_idx); } - double readFloatRegDouble(StaticInst<TheISA> *si, int idx) + double readFloatRegDouble(const StaticInst<TheISA> *si, int idx) { int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; return xc->readFloatRegDouble(reg_idx); } - uint64_t readFloatRegInt(StaticInst<TheISA> *si, int idx) + uint64_t readFloatRegInt(const StaticInst<TheISA> *si, int idx) { int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; return xc->readFloatRegInt(reg_idx); } - void setIntReg(StaticInst<TheISA> *si, int idx, uint64_t val) + void setIntReg(const StaticInst<TheISA> *si, int idx, uint64_t val) { xc->setIntReg(si->destRegIdx(idx), val); } - void setFloatRegSingle(StaticInst<TheISA> *si, int idx, float val) + void setFloatRegSingle(const StaticInst<TheISA> *si, int idx, float val) { int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; xc->setFloatRegSingle(reg_idx, val); } - void setFloatRegDouble(StaticInst<TheISA> *si, int idx, double val) + void setFloatRegDouble(const StaticInst<TheISA> *si, int idx, double val) { int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; xc->setFloatRegDouble(reg_idx, val); } - void setFloatRegInt(StaticInst<TheISA> *si, int idx, uint64_t val) + void setFloatRegInt(const StaticInst<TheISA> *si, int idx, uint64_t val) { int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; xc->setFloatRegInt(reg_idx, val); |