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author | Steve Reinhardt <stever@eecs.umich.edu> | 2004-02-02 15:55:35 -0800 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2004-02-02 15:55:35 -0800 |
commit | 548b4a1cb045c6675692e8ed7c6375ebb808c803 (patch) | |
tree | c7a28b92dddb711c6bb2ed2c7a11ea2d387277a3 /cpu/simple_cpu | |
parent | 956aff1291990639f8a59a95c6b22e0c17bb8cd8 (diff) | |
download | gem5-548b4a1cb045c6675692e8ed7c6375ebb808c803.tar.xz |
Change "Foo& foo" declarations to "Foo &foo".
This primarily to be internally consistent (sometimes we used one,
sometimes the other, even within the same line of code!).
I picked the latter to be symmetric with "Foo *foo".
base/cprintf_formats.hh:
base/range.hh:
base/refcnt.hh:
base/res_list.hh:
base/statistics.hh:
base/str.hh:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/syscall_emul.hh:
Change "Foo& foo" declarations to "Foo &foo".
--HG--
extra : convert_revision : ca1b0e85a578b539214bda3b8d61ac23792f2e87
Diffstat (limited to 'cpu/simple_cpu')
-rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 2 | ||||
-rw-r--r-- | cpu/simple_cpu/simple_cpu.hh | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 0d5fc4077..e9284ad31 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -321,7 +321,7 @@ change_thread_state(int thread_number, int activate, int priority) // precise architected memory state accessor macros template <class T> Fault -SimpleCPU::read(Addr addr, T& data, unsigned flags) +SimpleCPU::read(Addr addr, T &data, unsigned flags) { memReq->reset(addr, sizeof(T), flags); diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 7c9d4ea75..16753fa4f 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -227,7 +227,7 @@ class SimpleCPU : public BaseCPU virtual void unserialize(Checkpoint *cp, const std::string §ion); template <class T> - Fault read(Addr addr, T& data, unsigned flags); + Fault read(Addr addr, T &data, unsigned flags); template <class T> Fault write(T data, Addr addr, unsigned flags, |