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authorKevin Lim <ktlim@umich.edu>2004-05-28 11:41:52 -0400
committerKevin Lim <ktlim@umich.edu>2004-05-28 11:41:52 -0400
commit67b5f6afc10a87a5942d24ad503f3e6b9358580c (patch)
tree9cf28cf00687b98d3e818b4a72b8ed583d7061e2 /cpu/static_inst.hh
parent4f34dda81cf26340b9446e5a15bbbcd8840b92a2 (diff)
parenta896960cbfce76a0e0c8cfb5cbdfc805ce72577b (diff)
downloadgem5-67b5f6afc10a87a5942d24ad503f3e6b9358580c.tar.xz
Merged in new FastCPU stuff with existing code.
arch/alpha/ev5.cc: Added templatized processInterrupts() function that can be used by all of the CPU models. arch/alpha/isa_desc: Merged in changes to remove CPU dependence. arch/isa_parser.py: Merged in changes. cpu/static_inst.hh: Includes FastCPU execute methods. --HG-- extra : convert_revision : fcaa1dca35a9b316c73982bec8680df564f50bd8
Diffstat (limited to 'cpu/static_inst.hh')
-rw-r--r--cpu/static_inst.hh6
1 files changed, 6 insertions, 0 deletions
diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh
index 088fdbdb7..3eeefb675 100644
--- a/cpu/static_inst.hh
+++ b/cpu/static_inst.hh
@@ -42,6 +42,7 @@
// forward declarations
class ExecContext;
class DynInst;
+class FastCPU;
class SimpleCPU;
class SymbolTable;
@@ -313,6 +314,11 @@ class StaticInst : public StaticInstBase
virtual Fault execute(SimpleCPU *xc, Trace::InstRecord *traceData) = 0;
/**
+ * Execute this instruction under FastCPU model.
+ */
+ virtual Fault execute(FastCPU *xc, Trace::InstRecord *traceData) = 0;
+
+ /**
* Execute this instruction under detailed FullCPU model.
*/
virtual Fault execute(DynInst *xc, Trace::InstRecord *traceData) = 0;