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| author | Lisa Hsu <hsul@eecs.umich.edu> | 2004-03-11 18:52:29 -0500 |
|---|---|---|
| committer | Lisa Hsu <hsul@eecs.umich.edu> | 2004-03-11 18:52:29 -0500 |
| commit | 3bc8cffc75c2e03a6a8fe5f4425940a16405f672 (patch) | |
| tree | 1d44dba1a7dbd4aef6fad45753b7607928d3414a /cpu/static_inst.hh | |
| parent | 1039028d408d5a374a67d8d3ecc640a0e6559fbb (diff) | |
| parent | 2c60d7aa9e4b48f30ab8c48436ff2dfec8e390f2 (diff) | |
| download | gem5-3bc8cffc75c2e03a6a8fe5f4425940a16405f672.tar.xz | |
merge with m5 head
--HG--
extra : convert_revision : c90339248d1ee74df1c6b90a77ec9ea41f646311
Diffstat (limited to 'cpu/static_inst.hh')
| -rw-r--r-- | cpu/static_inst.hh | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 5f4bcae3d..cdf9aefa0 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -96,6 +96,7 @@ class StaticInstBase : public RefCounted IsStore, ///< Writes to memory. IsInstPrefetch, ///< Instruction-cache prefetch. IsDataPrefetch, ///< Data-cache prefetch. + IsCopy, ///< Fast Cache block copy IsControl, ///< Control transfer instruction. IsDirectControl, ///< PC relative control transfer. @@ -176,6 +177,7 @@ class StaticInstBase : public RefCounted bool isStore() const { return flags[IsStore]; } bool isInstPrefetch() const { return flags[IsInstPrefetch]; } bool isDataPrefetch() const { return flags[IsDataPrefetch]; } + bool isCopy() const { return flags[IsCopy];} bool isInteger() const { return flags[IsInteger]; } bool isFloating() const { return flags[IsFloating]; } |