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authorKevin Lim <ktlim@umich.edu>2006-03-03 16:04:34 -0500
committerKevin Lim <ktlim@umich.edu>2006-03-03 16:04:34 -0500
commitfc664f7ca6d4883e9efe7fb823cd903a867af7a9 (patch)
tree611a86dd02addcf7c44255aa66d7e2607dab0339 /cpu/static_inst.hh
parent9ad917858763bb44c8e6e22b7bb370fd50d518df (diff)
parent14b6cd39aadcac72e8fce47e24445037bae70309 (diff)
downloadgem5-fc664f7ca6d4883e9efe7fb823cd903a867af7a9.tar.xz
Merge ktlim@zizzer:/bk/m5
into zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs --HG-- extra : convert_revision : 979ab1fc4e1ea4d6a78ac9a2ec894f0be4feb01d
Diffstat (limited to 'cpu/static_inst.hh')
-rw-r--r--cpu/static_inst.hh14
1 files changed, 8 insertions, 6 deletions
diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh
index 5566f2f6d..20116554e 100644
--- a/cpu/static_inst.hh
+++ b/cpu/static_inst.hh
@@ -231,6 +231,8 @@ class StaticInst : public StaticInstBase
/// Binary machine instruction type.
typedef TheISA::MachInst MachInst;
+ /// Binary extended machine instruction type.
+ typedef TheISA::ExtMachInst ExtMachInst;
/// Logical register index type.
typedef TheISA::RegIndex RegIndex;
@@ -272,7 +274,7 @@ class StaticInst : public StaticInstBase
StaticInstPtr &memAccInst() const { return nullStaticInstPtr; }
/// The binary machine instruction.
- const MachInst machInst;
+ const ExtMachInst machInst;
protected:
@@ -302,7 +304,7 @@ class StaticInst : public StaticInstBase
generateDisassembly(Addr pc, const SymbolTable *symtab) const = 0;
/// Constructor.
- StaticInst(const char *_mnemonic, MachInst _machInst, OpClass __opClass)
+ StaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass)
: StaticInstBase(__opClass),
machInst(_machInst), mnemonic(_mnemonic), cachedDisassembly(0)
{
@@ -372,7 +374,7 @@ class StaticInst : public StaticInstBase
/// Decoded instruction cache type.
/// For now we're using a generic hash_map; this seems to work
/// pretty well.
- typedef m5::hash_map<MachInst, StaticInstPtr> DecodeCache;
+ typedef m5::hash_map<ExtMachInst, StaticInstPtr> DecodeCache;
/// A cache of decoded instruction objects.
static DecodeCache decodeCache;
@@ -387,7 +389,7 @@ class StaticInst : public StaticInstBase
/// @param mach_inst The binary instruction to decode.
/// @retval A pointer to the corresponding StaticInst object.
//This is defined as inline below.
- static StaticInstPtr decode(MachInst mach_inst);
+ static StaticInstPtr decode(ExtMachInst mach_inst);
};
typedef RefCountingPtr<StaticInstBase> StaticInstBasePtr;
@@ -418,7 +420,7 @@ class StaticInstPtr : public RefCountingPtr<StaticInst>
/// Construct directly from machine instruction.
/// Calls StaticInst::decode().
- StaticInstPtr(TheISA::MachInst mach_inst)
+ StaticInstPtr(TheISA::ExtMachInst mach_inst)
: RefCountingPtr<StaticInst>(StaticInst::decode(mach_inst))
{
}
@@ -431,7 +433,7 @@ class StaticInstPtr : public RefCountingPtr<StaticInst>
};
inline StaticInstPtr
-StaticInst::decode(StaticInst::MachInst mach_inst)
+StaticInst::decode(StaticInst::ExtMachInst mach_inst)
{
#ifdef DECODE_CACHE_HASH_STATS
// Simple stats on decode hash_map. Turns out the default