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authorKevin Lim <ktlim@umich.edu>2006-04-22 19:10:39 -0400
committerKevin Lim <ktlim@umich.edu>2006-04-22 19:10:39 -0400
commit6b4396111ba26fd16c7cf0047c4cb3e13036c298 (patch)
treebb986809ce7f4638da620fb0590422d26b3990e5 /cpu/static_inst.hh
parentbfc507e44ecc08c4ded037cf589e968f2ba42705 (diff)
downloadgem5-6b4396111ba26fd16c7cf0047c4cb3e13036c298.tar.xz
Updates for OzoneCPU.
cpu/static_inst.hh: Updates for new CPU, also include a classification of quiesce instructions. --HG-- extra : convert_revision : a34cd56da88fe57d7de24674fbb375bbf13f887f
Diffstat (limited to 'cpu/static_inst.hh')
-rw-r--r--cpu/static_inst.hh7
1 files changed, 7 insertions, 0 deletions
diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh
index 20116554e..550609ed7 100644
--- a/cpu/static_inst.hh
+++ b/cpu/static_inst.hh
@@ -40,12 +40,17 @@
// forward declarations
struct AlphaSimpleImpl;
+struct OzoneImpl;
+struct SimpleImpl;
class ExecContext;
class DynInst;
template <class Impl>
class AlphaDynInst;
+template <class Impl>
+class OzoneDynInst;
+
class FastCPU;
class SimpleCPU;
class InorderCPU;
@@ -121,6 +126,7 @@ class StaticInstBase : public RefCounted
IsWriteBarrier, ///< Is a write barrier
IsNonSpeculative, ///< Should not be executed speculatively
+ IsQuiesce,
NumFlags
};
@@ -208,6 +214,7 @@ class StaticInstBase : public RefCounted
bool isMemBarrier() const { return flags[IsMemBarrier]; }
bool isWriteBarrier() const { return flags[IsWriteBarrier]; }
bool isNonSpeculative() const { return flags[IsNonSpeculative]; }
+ bool isQuiesce() const { return flags[IsQuiesce]; }
//@}
/// Operation class. Used to select appropriate function unit in issue.