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authorErik Hallnor <ehallnor@umich.edu>2004-06-08 17:31:04 -0400
committerErik Hallnor <ehallnor@umich.edu>2004-06-08 17:31:04 -0400
commit5f4297e865eab5b28c2c17711ecf590934961335 (patch)
treeed07b845c521b8d50e9972d57d663ecca7e7bac6 /cpu/trace/reader/m5_reader.cc
parent73308846cc433fbb02a818283c9c2715ed2fbfee (diff)
downloadgem5-5f4297e865eab5b28c2c17711ecf590934961335.tar.xz
Add the capability to read and write memory trace files. Currently is cycle accurate for a single thread FullCPU.
--HG-- extra : convert_revision : f8fe545313eb307cc6f5ff2c23894cc9870b1d5b
Diffstat (limited to 'cpu/trace/reader/m5_reader.cc')
-rw-r--r--cpu/trace/reader/m5_reader.cc93
1 files changed, 93 insertions, 0 deletions
diff --git a/cpu/trace/reader/m5_reader.cc b/cpu/trace/reader/m5_reader.cc
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+++ b/cpu/trace/reader/m5_reader.cc
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+/*
+ * Copyright (c) 2003-2004 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * Declaration of a memory trace reader for a M5 memory trace.
+ */
+
+#include "cpu/trace/reader/m5_reader.hh"
+#include "mem/trace/m5_format.hh"
+#include "mem/mem_cmd.hh"
+#include "sim/builder.hh"
+
+using namespace std;
+
+M5Reader::M5Reader(const string &name, const string &filename)
+ : MemTraceReader(name)
+{
+ traceFile.open(filename.c_str(), ios::binary);
+}
+
+Tick
+M5Reader::getNextReq(MemReqPtr &req)
+{
+ M5Format ref;
+
+ MemReqPtr tmp_req;
+ // Need to read EOF char before eof() will return true.
+ traceFile.read((char*) &ref, sizeof(ref));
+ if (!traceFile.eof()) {
+ //traceFile.read((char*) &ref, sizeof(ref));
+ int gcount = traceFile.gcount();
+ assert(gcount != 0 || traceFile.eof());
+ assert(gcount == sizeof(ref));
+ assert(ref.cmd < 12);
+ tmp_req = new MemReq();
+ tmp_req->paddr = ref.paddr;
+ tmp_req->asid = ref.asid;
+ tmp_req->cmd = (MemCmdEnum)ref.cmd;
+ tmp_req->size = ref.size;
+ tmp_req->dest = ref.dest;
+ } else {
+ ref.cycle = 0;
+ }
+ req = tmp_req;
+ return ref.cycle;
+}
+
+BEGIN_DECLARE_SIM_OBJECT_PARAMS(M5Reader)
+
+ Param<string> filename;
+
+END_DECLARE_SIM_OBJECT_PARAMS(M5Reader)
+
+
+BEGIN_INIT_SIM_OBJECT_PARAMS(M5Reader)
+
+ INIT_PARAM(filename, "trace file")
+
+END_INIT_SIM_OBJECT_PARAMS(M5Reader)
+
+
+CREATE_SIM_OBJECT(M5Reader)
+{
+ return new M5Reader(getInstanceName(), filename);
+}
+
+REGISTER_SIM_OBJECT("M5Reader", M5Reader)