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authorGabe Black <gblack@eecs.umich.edu>2006-04-18 09:27:22 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-04-18 09:27:22 -0400
commit3d99b4a5447abb1ccca552cee281137e2b11a674 (patch)
treeb2c5fe75b956939247339e44cc546eb71393f9d5 /cpu
parent832311a17094501a6883100ac9dba8c781211782 (diff)
downloadgem5-3d99b4a5447abb1ccca552cee281137e2b11a674.tar.xz
Fixes to SPARC syscall emulation mode.
arch/sparc/isa/base.isa: Added a set of abbreviations for the different condition tests. arch/sparc/isa/decoder.isa: Fixes and additions to get syscall emulation closer to working. arch/sparc/isa/formats/branch.isa: Fixed branches so that the immediate version actually uses the immediate value arch/sparc/isa/formats/integerop.isa: Compute the condition codes -before- writing to the state of the machine. arch/sparc/isa/formats/mem.isa: An attempt to fix up the output of the disassembly of loads and stores. arch/sparc/isa/formats/trap.isa: Added code to disassemble a trap instruction. This probably needs to be fixed up so there are immediate and register versions. arch/sparc/isa/operands.isa: Added an R1 operand, and fixed up the numbering arch/sparc/isa_traits.hh: SyscallNumReg is no longer needed, the max number of sources and destinations are fixed up, and the syscall return uses xcc instead of icc. arch/sparc/linux/process.cc: arch/sparc/linux/process.hh: Added a getresuidFunc syscall implementation. This isn't actually used, but I thought it was and will leave it in. arch/sparc/process.cc: arch/sparc/process.hh: Fixed up how the initial stack frame is set up. arch/sparc/regfile.hh: Changed the number of windows from 6 to 32 so we don't have to worry about spill and fill traps for now, and commented out the register file setting itself up. cpu/cpu_exec_context.hh: cpu/exec_context.hh: cpu/simple/cpu.hh: sim/process.cc: sim/process.hh: Changed the syscall mechanism to pass down the syscall number directly. --HG-- extra : convert_revision : 15723b949a0ddb3d24e68c079343b4dba2439f43
Diffstat (limited to 'cpu')
-rw-r--r--cpu/cpu_exec_context.hh4
-rw-r--r--cpu/exec_context.hh4
-rw-r--r--cpu/simple/cpu.hh2
3 files changed, 5 insertions, 5 deletions
diff --git a/cpu/cpu_exec_context.hh b/cpu/cpu_exec_context.hh
index c74feec68..736af85ba 100644
--- a/cpu/cpu_exec_context.hh
+++ b/cpu/cpu_exec_context.hh
@@ -518,9 +518,9 @@ class CPUExecContext
TheISA::setSyscallReturn(return_value, &regs);
}
- void syscall()
+ void syscall(int64_t callnum)
{
- process->syscall(proxy);
+ process->syscall(callnum, proxy);
}
Counter readFuncExeInst() { return func_exe_inst; }
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index dd3d2cba1..4e40bc48d 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -234,7 +234,7 @@ class ExecContext
virtual void setSyscallReturn(SyscallReturn return_value) = 0;
- virtual void syscall() = 0;
+ virtual void syscall(int64_t callnum) = 0;
// Same with st cond failures.
virtual Counter readFuncExeInst() = 0;
@@ -432,7 +432,7 @@ class ProxyExecContext : public ExecContext
void setSyscallReturn(SyscallReturn return_value)
{ actualXC->setSyscallReturn(return_value); }
- void syscall() { actualXC->syscall(); }
+ void syscall(int64_t callnum) { actualXC->syscall(callnum); }
Counter readFuncExeInst() { return actualXC->readFuncExeInst(); }
diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh
index 43287a33b..9da7072bf 100644
--- a/cpu/simple/cpu.hh
+++ b/cpu/simple/cpu.hh
@@ -414,7 +414,7 @@ class SimpleCPU : public BaseCPU
void ev5_trap(Fault fault) { fault->invoke(xcProxy); }
bool simPalCheck(int palFunc) { return cpuXC->simPalCheck(palFunc); }
#else
- void syscall() { cpuXC->syscall(); }
+ void syscall(int64_t callnum) { cpuXC->syscall(callnum); }
#endif
bool misspeculating() { return cpuXC->misspeculating(); }