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authorSteve Reinhardt <stever@eecs.umich.edu>2003-11-03 20:26:51 -0800
committerSteve Reinhardt <stever@eecs.umich.edu>2003-11-03 20:26:51 -0800
commit40b9a3878aed4e2400727ca87e1c9976cdecef58 (patch)
tree8c24cf73c21f2ff6ef3ce0d3df212071ebe77508 /cpu
parentdc8370852f59f881a37161ea335573616dbd17b3 (diff)
downloadgem5-40b9a3878aed4e2400727ca87e1c9976cdecef58.tar.xz
Minor changes to instruction trace output.
arch/alpha/isa_desc: A few disassembly changes to make it easier to compare with old machine.def traces: - Make lds prefetches print f31 instead of r31 as dest. - Don't print mode suffixes on FP if SS_COMPATIBLE_DISASSEMBLY cpu/exetrace.cc: Left-justify instruction in field, and increase width by 1. --HG-- extra : convert_revision : 9ffd56728f1bb772aa3ccda5f027b93d4c3a4135
Diffstat (limited to 'cpu')
-rw-r--r--cpu/exetrace.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/exetrace.cc b/cpu/exetrace.cc
index c350288bc..ce6b0c544 100644
--- a/cpu/exetrace.cc
+++ b/cpu/exetrace.cc
@@ -74,11 +74,11 @@ Trace::InstRecord::dump(ostream &outs)
// There's a bug in gcc 2.x library that prevents setw()
// from working properly on strings
string mc(staticInst->disassemble(PC, debugSymbolTable));
- while (mc.length() < 25)
+ while (mc.length() < 26)
mc += " ";
outs << mc;
#else
- outs << setw(25) << staticInst->disassemble(PC, debugSymbolTable);
+ outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
#endif
outs << " : ";