diff options
author | Kevin Lim <ktlim@umich.edu> | 2004-05-28 11:41:52 -0400 |
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committer | Kevin Lim <ktlim@umich.edu> | 2004-05-28 11:41:52 -0400 |
commit | 67b5f6afc10a87a5942d24ad503f3e6b9358580c (patch) | |
tree | 9cf28cf00687b98d3e818b4a72b8ed583d7061e2 /cpu | |
parent | 4f34dda81cf26340b9446e5a15bbbcd8840b92a2 (diff) | |
parent | a896960cbfce76a0e0c8cfb5cbdfc805ce72577b (diff) | |
download | gem5-67b5f6afc10a87a5942d24ad503f3e6b9358580c.tar.xz |
Merged in new FastCPU stuff with existing code.
arch/alpha/ev5.cc:
Added templatized processInterrupts() function that can be used by all of the CPU models.
arch/alpha/isa_desc:
Merged in changes to remove CPU dependence.
arch/isa_parser.py:
Merged in changes.
cpu/static_inst.hh:
Includes FastCPU execute methods.
--HG--
extra : convert_revision : fcaa1dca35a9b316c73982bec8680df564f50bd8
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/exec_context.cc | 15 | ||||
-rw-r--r-- | cpu/exec_context.hh | 24 | ||||
-rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 3 | ||||
-rw-r--r-- | cpu/static_inst.hh | 6 |
4 files changed, 46 insertions, 2 deletions
diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 7f7719bf0..0d3a80fe7 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -106,6 +106,7 @@ ExecContext::serialize(ostream &os) regs.serialize(os); // thread_num and cpu_id are deterministic from the config SERIALIZE_SCALAR(func_exe_inst); + SERIALIZE_SCALAR(inst); #ifdef FULL_SYSTEM bool ctx = false; @@ -143,6 +144,7 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) regs.unserialize(cp, section); // thread_num and cpu_id are deterministic from the config UNSERIALIZE_SCALAR(func_exe_inst); + UNSERIALIZE_SCALAR(inst); #ifdef FULL_SYSTEM bool ctx; @@ -233,3 +235,16 @@ ExecContext::regStats(const string &name) kernelStats.regStats(name + ".kern"); #endif } + +void +ExecContext::trap(Fault fault) +{ + //TheISA::trap(fault); //One possible way to do it... + + /** @todo: Going to hack it for now. Do a true fixup later. */ +#ifdef FULL_SYSTEM + ev5_trap(fault); +#else + fatal("fault (%d) detected @ PC 0x%08p", fault, readPC()); +#endif +} diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index 7be83539a..a62225f1b 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -31,6 +31,7 @@ #include "sim/host.hh" #include "mem/mem_req.hh" +#include "mem/functional_mem/functional_memory.hh" #include "sim/serialize.hh" // forward declaration: see functional_memory.hh @@ -114,6 +115,9 @@ class ExecContext // pointer to CPU associated with this context BaseCPU *cpu; + // Current instruction + MachInst inst; + // Index of hardware thread context on the CPU that this represents. int thread_num; @@ -311,6 +315,18 @@ class ExecContext virtual bool misspeculating(); + MachInst getInst() { return inst; } + + void setInst(MachInst new_inst) + { + inst = new_inst; + } + + Fault instRead(MemReqPtr &req) + { + return mem->read(req, inst); + } + // // New accessors for new decoder. // @@ -395,6 +411,14 @@ class ExecContext bool simPalCheck(int palFunc); #endif + /** Meant to be more generic trap function to be + * called when an instruction faults. + * @param fault The fault generated by executing the instruction. + * @todo How to do this properly so it's dependent upon ISA only? + */ + + void trap(Fault fault); + #ifndef FULL_SYSTEM IntReg getSyscallArg(int i) { diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 1ade235ed..e1a861ad8 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -714,8 +714,7 @@ SimpleCPU::tick() xc->regs.pc); #ifdef FULL_SYSTEM - xc->regs.opcode = (inst >> 26) & 0x3f; - xc->regs.ra = (inst >> 21) & 0x1f; + xc->setInst(inst); #endif // FULL_SYSTEM xc->func_exe_inst++; diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 088fdbdb7..3eeefb675 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -42,6 +42,7 @@ // forward declarations class ExecContext; class DynInst; +class FastCPU; class SimpleCPU; class SymbolTable; @@ -313,6 +314,11 @@ class StaticInst : public StaticInstBase virtual Fault execute(SimpleCPU *xc, Trace::InstRecord *traceData) = 0; /** + * Execute this instruction under FastCPU model. + */ + virtual Fault execute(FastCPU *xc, Trace::InstRecord *traceData) = 0; + + /** * Execute this instruction under detailed FullCPU model. */ virtual Fault execute(DynInst *xc, Trace::InstRecord *traceData) = 0; |