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authorSteve Reinhardt <stever@eecs.umich.edu>2005-06-05 08:08:29 -0400
committerSteve Reinhardt <stever@eecs.umich.edu>2005-06-05 08:08:29 -0400
commit5f0f42f166cb05636c51330bdb708f1d443881c7 (patch)
treea06771866d12e3ad77eb70c60f2703fae971c517 /cpu
parentad8b9636f8576f1431ef60019788affe780eb851 (diff)
downloadgem5-5f0f42f166cb05636c51330bdb708f1d443881c7.tar.xz
Fix minor doxygen issues.
Doxyfile: Turn on EXTRACT_ALL so we get full class hierarchy info. base/range.hh: cpu/o3/fetch.hh: cpu/o3/rename_map.hh: cpu/o3/rob.hh: dev/ide_disk.cc: dev/tsunami.cc: dev/tsunami.hh: dev/tsunami_cchip.hh: Fix doxygen issues. --HG-- extra : convert_revision : 9e0e8d3510b35db201459b8a3211c5e6ad5f0bb4
Diffstat (limited to 'cpu')
-rw-r--r--cpu/o3/fetch.hh4
-rw-r--r--cpu/o3/rename_map.hh3
-rw-r--r--cpu/o3/rob.hh8
3 files changed, 7 insertions, 8 deletions
diff --git a/cpu/o3/fetch.hh b/cpu/o3/fetch.hh
index a63010762..24e445f0b 100644
--- a/cpu/o3/fetch.hh
+++ b/cpu/o3/fetch.hh
@@ -109,7 +109,7 @@ class SimpleFetch
/**
* Looks up in the branch predictor to see if the next PC should be
* either next PC+=MachInst or a branch target.
- * @params next_PC Next PC variable passed in by reference. It is
+ * @param next_PC Next PC variable passed in by reference. It is
* expected to be set to the current PC; it will be updated with what
* the next PC will be.
* @return Whether or not a branch was predicted as taken.
@@ -120,7 +120,7 @@ class SimpleFetch
* Fetches the cache line that contains fetch_PC. Returns any
* fault that happened. Puts the data into the class variable
* cacheData.
- * @params fetch_PC The PC address that is being fetched from.
+ * @param fetch_PC The PC address that is being fetched from.
* @return Any fault that occured.
*/
Fault fetchCacheLine(Addr fetch_PC);
diff --git a/cpu/o3/rename_map.hh b/cpu/o3/rename_map.hh
index 1469476ce..c44c7a1ea 100644
--- a/cpu/o3/rename_map.hh
+++ b/cpu/o3/rename_map.hh
@@ -85,8 +85,7 @@ class SimpleRenameMap
/**
* Marks the given register as ready, meaning that its value has been
* calculated and written to the register file.
- * @params ready_reg The index of the physical register that is now
- * ready.
+ * @param ready_reg The index of the physical register that is now ready.
*/
void markAsReady(PhysRegIndex ready_reg);
diff --git a/cpu/o3/rob.hh b/cpu/o3/rob.hh
index 07ad75b52..29ec48007 100644
--- a/cpu/o3/rob.hh
+++ b/cpu/o3/rob.hh
@@ -57,15 +57,15 @@ class ROB
public:
/** ROB constructor.
- * @params _numEntries Number of entries in ROB.
- * @params _squashWidth Number of instructions that can be squashed in a
+ * @param _numEntries Number of entries in ROB.
+ * @param _squashWidth Number of instructions that can be squashed in a
* single cycle.
*/
ROB(unsigned _numEntries, unsigned _squashWidth);
/** Function to set the CPU pointer, necessary due to which object the ROB
* is created within.
- * @params cpu_ptr Pointer to the implementation specific full CPU object.
+ * @param cpu_ptr Pointer to the implementation specific full CPU object.
*/
void setCPU(FullCPU *cpu_ptr);
@@ -73,7 +73,7 @@ class ROB
* not truly required, but is useful for checking correctness. Note
* that whatever calls this function must ensure that there is enough
* space within the ROB for the new instruction.
- * @params inst The instruction being inserted into the ROB.
+ * @param inst The instruction being inserted into the ROB.
* @todo Remove the parameter once correctness is ensured.
*/
void insertInst(DynInstPtr &inst);