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authorSteve Reinhardt <stever@eecs.umich.edu>2005-06-01 21:44:00 -0400
committerSteve Reinhardt <stever@eecs.umich.edu>2005-06-01 21:44:00 -0400
commit8031cd93b53cd3fe17a5a5f21e8e8bd833398e97 (patch)
tree2a50907134c83a47058e563522aff265d2487756 /cpu
parent3304da9270d4b40f445a5ca94c33d68cc52ccddf (diff)
downloadgem5-8031cd93b53cd3fe17a5a5f21e8e8bd833398e97.tar.xz
Standardize clock parameter names to 'clock'.
Fix description for Bus clock_ratio (no longer a ratio). Add Clock param type (generic Frequency or Latency). cpu/base_cpu.cc: cpu/base_cpu.hh: cpu/beta_cpu/alpha_full_cpu_builder.cc: cpu/simple_cpu/simple_cpu.cc: dev/ide_ctrl.cc: dev/ns_gige.cc: dev/ns_gige.hh: dev/pciconfigall.cc: dev/sinic.cc: dev/tsunami_cchip.cc: dev/tsunami_io.cc: dev/tsunami_pchip.cc: dev/uart.cc: python/m5/objects/BaseCPU.py: python/m5/objects/BaseCache.py: python/m5/objects/BaseSystem.py: python/m5/objects/Bus.py: python/m5/objects/Ethernet.py: python/m5/objects/Root.py: sim/universe.cc: Standardize clock parameter names to 'clock'. Fix description for Bus clock_ratio (no longer a ratio). python/m5/config.py: Minor tweaks on Frequency/Latency: - added new Clock param type to avoid ambiguities - factored out init code into getLatency() - made RootFrequency *not* a subclass of Frequency so it can't be directly assigned to a Frequency paremeter --HG-- extra : convert_revision : fc4bb8562df171b454bbf696314cda57e1ec8506
Diffstat (limited to 'cpu')
-rw-r--r--cpu/base_cpu.cc4
-rw-r--r--cpu/base_cpu.hh10
-rw-r--r--cpu/beta_cpu/alpha_full_cpu_builder.cc6
-rw-r--r--cpu/simple_cpu/simple_cpu.cc6
4 files changed, 13 insertions, 13 deletions
diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc
index 1077c8a51..fd91749f7 100644
--- a/cpu/base_cpu.cc
+++ b/cpu/base_cpu.cc
@@ -53,11 +53,11 @@ int maxThreadsPerCPU = 1;
#ifdef FULL_SYSTEM
BaseCPU::BaseCPU(Params *p)
- : SimObject(p->name), cycleTime(p->cycleTime), checkInterrupts(true),
+ : SimObject(p->name), clock(p->clock), checkInterrupts(true),
params(p), number_of_threads(p->numberOfThreads), system(p->system)
#else
BaseCPU::BaseCPU(Params *p)
- : SimObject(p->name), cycleTime(p->cycleTime), params(p),
+ : SimObject(p->name), clock(p->clock), params(p),
number_of_threads(p->numberOfThreads)
#endif
{
diff --git a/cpu/base_cpu.hh b/cpu/base_cpu.hh
index ea12460db..f38a6c939 100644
--- a/cpu/base_cpu.hh
+++ b/cpu/base_cpu.hh
@@ -48,12 +48,12 @@ class BaseCPU : public SimObject
{
protected:
// CPU's clock period in terms of the number of ticks of curTime.
- Tick cycleTime;
+ Tick clock;
public:
- inline Tick frequency() const { return Clock::Frequency / cycleTime; }
- inline Tick cycles(int numCycles) const { return cycleTime * numCycles; }
- inline Tick curCycle() const { return curTick / cycleTime; }
+ inline Tick frequency() const { return Clock::Frequency / clock; }
+ inline Tick cycles(int numCycles) const { return clock * numCycles; }
+ inline Tick curCycle() const { return curTick / clock; }
#ifdef FULL_SYSTEM
protected:
@@ -106,7 +106,7 @@ class BaseCPU : public SimObject
Counter max_insts_all_threads;
Counter max_loads_any_thread;
Counter max_loads_all_threads;
- Tick cycleTime;
+ Tick clock;
bool functionTrace;
Tick functionTraceStart;
#ifdef FULL_SYSTEM
diff --git a/cpu/beta_cpu/alpha_full_cpu_builder.cc b/cpu/beta_cpu/alpha_full_cpu_builder.cc
index c0370f208..f56c9f6c3 100644
--- a/cpu/beta_cpu/alpha_full_cpu_builder.cc
+++ b/cpu/beta_cpu/alpha_full_cpu_builder.cc
@@ -71,7 +71,7 @@ class DerivAlphaFullCPU : public AlphaFullCPU<AlphaSimpleImpl>
BEGIN_DECLARE_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
- Param<int> cycle_time;
+ Param<int> clock;
Param<int> numThreads;
#ifdef FULL_SYSTEM
@@ -164,7 +164,7 @@ END_DECLARE_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
BEGIN_INIT_SIM_OBJECT_PARAMS(DerivAlphaFullCPU)
- INIT_PARAM(cycle_time, "cpu cycle time"),
+ INIT_PARAM(clock, "clock speed"),
INIT_PARAM(numThreads, "number of HW thread contexts"),
#ifdef FULL_SYSTEM
@@ -298,7 +298,7 @@ CREATE_SIM_OBJECT(DerivAlphaFullCPU)
AlphaSimpleParams params;
- params.cycleTime = cycle_time;
+ params.clock = clock;
params.name = getInstanceName();
params.numberOfThreads = actual_num_threads;
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index 06fee208d..f20b537f2 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -831,7 +831,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(SimpleCPU)
SimObjectParam<Process *> workload;
#endif // FULL_SYSTEM
- Param<int> cycle_time;
+ Param<int> clock;
SimObjectParam<BaseMem *> icache;
SimObjectParam<BaseMem *> dcache;
@@ -863,7 +863,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(SimpleCPU)
INIT_PARAM(workload, "processes to run"),
#endif // FULL_SYSTEM
- INIT_PARAM(cycle_time, "cpu cycle time"),
+ INIT_PARAM(clock, "clock speed"),
INIT_PARAM(icache, "L1 instruction cache object"),
INIT_PARAM(dcache, "L1 data cache object"),
INIT_PARAM(defer_registration, "defer system registration (for sampling)"),
@@ -889,7 +889,7 @@ CREATE_SIM_OBJECT(SimpleCPU)
params->max_loads_any_thread = max_loads_any_thread;
params->max_loads_all_threads = max_loads_all_threads;
params->deferRegistration = defer_registration;
- params->cycleTime = cycle_time;
+ params->clock = clock;
params->functionTrace = function_trace;
params->functionTraceStart = function_trace_start;
params->icache_interface = (icache) ? icache->getInterface() : NULL;