Merge zed.eecs.umich.edu:/.automount/fox/y/mserrano/m5_dir/m5

into  zed.eecs.umich.edu:/z/benash/bk/m5

dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/rtcreg.h:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/uart8250.cc:
dev/uart8250.hh:
python/m5/objects/Tsunami.py:
    Merge code.

--HG--
extra : convert_revision : e97d5dbcc051d2061622201265430d359f995d48

4 files changed, 6 insertions, 6 deletions

diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index e9ff3e181..5e105c44d 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -263,7 +263,7 @@ class ExecContext
 
         Fault error;
         error = mem->read(req, data);
-        data = htoa(data);
+        data = gtoh(data);
         return error;
     }
 
@@ -313,7 +313,7 @@ class ExecContext
         }
 
 #endif
-        return mem->write(req, (T)htoa(data));
+        return mem->write(req, (T)htog(data));
     }
 
     virtual bool misspeculating();
diff --git a/cpu/o3/alpha_cpu.hh b/cpu/o3/alpha_cpu.hh
index 3c679c3b2..545165b2b 100644
--- a/cpu/o3/alpha_cpu.hh
+++ b/cpu/o3/alpha_cpu.hh
@@ -220,7 +220,7 @@ class AlphaFullCPU : public FullO3CPU<Impl>
 
         Fault error;
         error = this->mem->read(req, data);
-        data = htoa(data);
+        data = gtoh(data);
         return error;
     }
 
@@ -277,7 +277,7 @@ class AlphaFullCPU : public FullO3CPU<Impl>
 
 #endif
 
-        return this->mem->write(req, (T)htoa(data));
+        return this->mem->write(req, (T)htog(data));
     }
 
     template <class T>
diff --git a/cpu/o3/fetch_impl.hh b/cpu/o3/fetch_impl.hh
index 83d7a02e5..75b6abb3d 100644
--- a/cpu/o3/fetch_impl.hh
+++ b/cpu/o3/fetch_impl.hh
@@ -535,7 +535,7 @@ SimpleFetch<Impl>::fetch()
             assert(offset <= cacheBlkSize - instSize);
 
             // Get the instruction from the array of the cache line.
-            inst = htoa(*reinterpret_cast<MachInst *>
+            inst = gtoh(*reinterpret_cast<MachInst *>
                         (&cacheData[offset]));
 
             // Create a new DynInst from the instruction fetched.
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index 1164e35a4..c5e12990b 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -738,7 +738,7 @@ SimpleCPU::tick()
         comInstEventQueue[0]->serviceEvents(numInst);
 
         // decode the instruction
-        inst = htoa(inst);
+        inst = gtoh(inst);
         curStaticInst = StaticInst<TheISA>::decode(inst);
 
         traceData = Trace::getInstRecord(curTick, xc, this, curStaticInst,