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authorAli Saidi <saidi@eecs.umich.edu>2006-03-30 15:59:49 -0500
committerAli Saidi <saidi@eecs.umich.edu>2006-03-30 15:59:49 -0500
commite196d20d9d047a869e1d853fd02077b1d909a576 (patch)
tree3b45bd223ff1d144af5f94fc9431f01b8a0bad61 /cpu
parent0b2deb2a8897fa857d2b3e1936401c6666fdc728 (diff)
downloadgem5-e196d20d9d047a869e1d853fd02077b1d909a576.tar.xz
Make TranslatingPort be a type of Port rather than something special
arch/alpha/arguments.cc: rather than returning 0, put a panic in... it will actually make us fix this rather than scratching our respective heads base/loader/object_file.cc: base/loader/object_file.hh: Object loader now takes a port rather than a translating port cpu/cpu_exec_context.cc: cpu/cpu_exec_context.hh: sim/process.cc: Make translating port a type of port rather than anything special cpu/simple/cpu.cc: no need to grab a port from the cpu anymore mem/physical.cc: add an additional type of port to physicalmemory called "functional" Only used for functional accesses (loading binaries/syscall emu) mem/port.hh: make readBlok/writeBlob virtual so translating port can do the translation first mem/translating_port.cc: mem/translating_port.hh: Make TranslatingPort inherit from Port sim/system.cc: header file that doesn't exit removed --HG-- extra : convert_revision : 89b08f6146bba61f5605678d736055feab2fe6f7
Diffstat (limited to 'cpu')
-rw-r--r--cpu/cpu_exec_context.cc12
-rw-r--r--cpu/cpu_exec_context.hh2
-rw-r--r--cpu/simple/cpu.cc4
3 files changed, 12 insertions, 6 deletions
diff --git a/cpu/cpu_exec_context.cc b/cpu/cpu_exec_context.cc
index 4ada24068..f6edf4b13 100644
--- a/cpu/cpu_exec_context.cc
+++ b/cpu/cpu_exec_context.cc
@@ -42,10 +42,10 @@
#include "kern/kernel_stats.hh"
#include "sim/serialize.hh"
#include "sim/sim_exit.hh"
-#include "sim/system.hh"
#include "arch/stacktrace.hh"
#else
#include "sim/process.hh"
+#include "sim/system.hh"
#include "mem/translating_port.hh"
#endif
@@ -80,13 +80,19 @@ CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
}
#else
CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num,
- Process *_process, int _asid, Port *mem_port)
+ Process *_process, int _asid)
: _status(ExecContext::Unallocated),
cpu(_cpu), thread_num(_thread_num), cpu_id(-1), lastActivate(0),
lastSuspend(0), process(_process), asid(_asid),
func_exe_inst(0), storeCondFailures(0)
{
- port = new TranslatingPort(mem_port, process->pTable);
+ /* Use this port to for syscall emulation writes to memory. */
+ Port *mem_port;
+ port = new TranslatingPort(process->pTable, false);
+ mem_port = process->system->physmem->getPort("functional");
+ mem_port->setPeer(port);
+ port->setPeer(mem_port);
+
memset(&regs, 0, sizeof(RegFile));
proxy = new ProxyExecContext<CPUExecContext>(this);
}
diff --git a/cpu/cpu_exec_context.hh b/cpu/cpu_exec_context.hh
index 83afb3b85..9bf548a45 100644
--- a/cpu/cpu_exec_context.hh
+++ b/cpu/cpu_exec_context.hh
@@ -206,7 +206,7 @@ class CPUExecContext
AlphaITB *_itb, AlphaDTB *_dtb);
#else
CPUExecContext(BaseCPU *_cpu, int _thread_num, Process *_process,
- int _asid, Port *mem_port);
+ int _asid);
// Constructor to use XC to pass reg file around. Not used for anything
// else.
CPUExecContext(RegFile *regFile);
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index 3d37f970f..b7cfc4f16 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -168,8 +168,8 @@ SimpleCPU::SimpleCPU(Params *p)
#if FULL_SYSTEM
cpuXC = new CPUExecContext(this, 0, p->system, p->itb, p->dtb);
#else
- cpuXC = new CPUExecContext(this, /* thread_num */ 0, p->process, /* asid */ 0,
- &dcachePort);
+ cpuXC = new CPUExecContext(this, /* thread_num */ 0, p->process,
+ /* asid */ 0);
#endif // !FULL_SYSTEM
xcProxy = cpuXC->getProxy();