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authorRon Dreslinski <rdreslin@umich.edu>2005-02-09 12:56:24 -0500
committerRon Dreslinski <rdreslin@umich.edu>2005-02-09 12:56:24 -0500
commit230a5a608dfb2204e2886a795e6bd8a30224b84f (patch)
tree81d312257237c4d13ad44836d55d2f192a479036 /cpu
parentd9317dd348f3acd853d1e6a09c09f2a27ad5d707 (diff)
parentc4089562d5add225cd8275b59456eb7eb559b988 (diff)
downloadgem5-230a5a608dfb2204e2886a795e6bd8a30224b84f.tar.xz
Merger
cpu/simple_cpu/simple_cpu.hh: Merge --HG-- extra : convert_revision : 1b6003ac731051fefacb7d7a30c317553b4bf1bc
Diffstat (limited to 'cpu')
-rw-r--r--cpu/base_cpu.cc4
-rw-r--r--cpu/simple_cpu/simple_cpu.cc1
-rw-r--r--cpu/simple_cpu/simple_cpu.hh17
-rw-r--r--cpu/static_inst.cc2
-rw-r--r--cpu/static_inst.hh2
5 files changed, 13 insertions, 13 deletions
diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc
index 58f38d5d5..4325bfc17 100644
--- a/cpu/base_cpu.cc
+++ b/cpu/base_cpu.cc
@@ -77,7 +77,7 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
maxThreadsPerCPU = number_of_threads;
// allocate per-thread instruction-based event queues
- comInstEventQueue = new (EventQueue *)[number_of_threads];
+ comInstEventQueue = new EventQueue *[number_of_threads];
for (int i = 0; i < number_of_threads; ++i)
comInstEventQueue[i] = new EventQueue("instruction-based event queue");
@@ -102,7 +102,7 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
}
// allocate per-thread load-based event queues
- comLoadEventQueue = new (EventQueue *)[number_of_threads];
+ comLoadEventQueue = new EventQueue *[number_of_threads];
for (int i = 0; i < number_of_threads; ++i)
comLoadEventQueue[i] = new EventQueue("load-based event queue");
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index 2f1e8e1f1..685447f44 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -75,6 +75,7 @@
using namespace std;
+
SimpleCPU::TickEvent::TickEvent(SimpleCPU *c)
: Event(&mainEventQueue, CPU_Tick_Pri), cpu(c), multiplier(1)
{
diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh
index 85bd1a74f..59545fad4 100644
--- a/cpu/simple_cpu/simple_cpu.hh
+++ b/cpu/simple_cpu/simple_cpu.hh
@@ -26,8 +26,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __SIMPLE_CPU_HH__
-#define __SIMPLE_CPU_HH__
+#ifndef __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__
+#define __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__
#include "base/statistics.hh"
#include "cpu/base_cpu.hh"
@@ -103,12 +103,6 @@ class SimpleCPU : public BaseCPU
private:
Trace::InstRecord *traceData;
- template<typename T>
- void trace_data(T data) {
- if (traceData) {
- traceData->setData(data);
- }
- };
public:
//
@@ -258,6 +252,11 @@ class SimpleCPU : public BaseCPU
template <class T>
Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
+ // These functions are only used in CPU models that split
+ // effective address computation from the actual memory access.
+ void setEA(Addr EA) { panic("SimpleCPU::setEA() not implemented\n"); }
+ Addr getEA() { panic("SimpleCPU::getEA() not implemented\n"); }
+
void prefetch(Addr addr, unsigned flags)
{
// need to do this...
@@ -355,4 +354,4 @@ class SimpleCPU : public BaseCPU
ExecContext *xcBase() { return xc; }
};
-#endif // __SIMPLE_CPU_HH__
+#endif // __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__
diff --git a/cpu/static_inst.cc b/cpu/static_inst.cc
index 4cb45a818..7069d89ec 100644
--- a/cpu/static_inst.cc
+++ b/cpu/static_inst.cc
@@ -85,4 +85,4 @@ StaticInst<ISA>::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt)
// force instantiation of template function(s) above
-template StaticInst<AlphaISA>;
+template class StaticInst<AlphaISA>;
diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh
index 46b2e4b19..c442ada35 100644
--- a/cpu/static_inst.hh
+++ b/cpu/static_inst.hh
@@ -456,7 +456,7 @@ class StaticInstPtr : public RefCountingPtr<StaticInst<ISA> >
/// Convert to pointer to StaticInstBase class.
operator const StaticInstBasePtr()
{
- return get();
+ return this->get();
}
};