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authorAli Saidi <saidi@eecs.umich.edu>2006-02-23 14:50:16 -0500
committerAli Saidi <saidi@eecs.umich.edu>2006-02-23 14:50:16 -0500
commit1166d4f0bfe67a9dc178be3454b4f0eac38663ad (patch)
tree47e40edc5f2fdc70187bc32ceba9591931a066dd /cpu
parent7b42d61f13e16afb3b9191f7c7510ebf4c72fd08 (diff)
downloadgem5-1166d4f0bfe67a9dc178be3454b4f0eac38663ad.tar.xz
Get rid of the xc from the alphaAccess/alphaConsole backdoor device.
Now allocate an array of stacks indexed by cpu number which specify cpu stacks and are initialized by cpu 0. Othe cpus spin waiting for their stacks before continuing. This change *REQUIRES* a the new console code to operate correctly. arch/alpha/ev5.cc: Add cpuId to initCPU/initIPR functions cpu/o3/cpu.cc: cpu/simple/cpu.cc: cpu/simple/cpu.hh: Move the cpu initilization into an init() function since it now needs the CPU id which isn't known at construction dev/alpha_access.h: dev/alpha_console.cc: dev/alpha_console.hh: instead of the bootstrap variables, add space for 64 cpu stacks in the alpha access structure. sim/system.cc: start all cpus immediately rather than just the first one --HG-- extra : convert_revision : 28c218af49d885a0f203ada419f16f25d5a3f37b
Diffstat (limited to 'cpu')
-rw-r--r--cpu/o3/cpu.cc3
-rw-r--r--cpu/simple/cpu.cc17
-rw-r--r--cpu/simple/cpu.hh1
3 files changed, 17 insertions, 4 deletions
diff --git a/cpu/o3/cpu.cc b/cpu/o3/cpu.cc
index adc7b6bbc..6ea0ed7c7 100644
--- a/cpu/o3/cpu.cc
+++ b/cpu/o3/cpu.cc
@@ -137,8 +137,6 @@ FullO3CPU<Impl>::FullO3CPU(Params &params)
system->execContexts[i] =
new ExecContext(this, i, system, itb, dtb, mem);
- // initialize CPU, including PC
- TheISA::initCPU(&system->execContexts[i]->regs);
execContexts.push_back(system->execContexts[i]);
#else
if (i < params.workload.size()) {
@@ -250,6 +248,7 @@ FullO3CPU<Impl>::init()
// that it can start properly.
#if FULL_SYSTEM
ExecContext *src_xc = system->execContexts[0];
+ TheISA::initCPU(&src_xc->regs, src_xc->cpu_id);
#else
ExecContext *src_xc = thread[0];
#endif
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index 70217f0bb..2438e49f6 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -84,6 +84,21 @@ SimpleCPU::TickEvent::TickEvent(SimpleCPU *c, int w)
{
}
+
+void
+SimpleCPU::init()
+{
+ BaseCPU::init();
+#if FULL_SYSTEM
+ for (int i = 0; i < execContexts.size(); ++i) {
+ ExecContext *xc = execContexts[i];
+
+ // initialize CPU, including PC
+ TheISA::initCPU(&xc->regs, xc->cpu_id);
+ }
+#endif
+}
+
void
SimpleCPU::TickEvent::process()
{
@@ -124,8 +139,6 @@ SimpleCPU::SimpleCPU(Params *p)
#if FULL_SYSTEM
xc = new ExecContext(this, 0, p->system, p->itb, p->dtb, p->mem);
- // initialize CPU, including PC
- TheISA::initCPU(&xc->regs);
#else
xc = new ExecContext(this, /* thread_num */ 0, p->process, /* asid */ 0);
#endif // !FULL_SYSTEM
diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh
index 0f7251237..564749592 100644
--- a/cpu/simple/cpu.hh
+++ b/cpu/simple/cpu.hh
@@ -66,6 +66,7 @@ class SimpleCPU : public BaseCPU
public:
// main simulation loop (one cycle)
void tick();
+ virtual void init();
private:
struct TickEvent : public Event