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authorRon Dreslinski <rdreslin@umich.edu>2006-01-31 14:39:41 -0500
committerRon Dreslinski <rdreslin@umich.edu>2006-01-31 14:39:41 -0500
commit2f644efafaa6df54f4e9b8f2710aa6f3647b6940 (patch)
tree211de75061ebca25d6552bb7ee3d3e3131b97cb9 /cpu
parentfccd113e2f628e829e83dfab9288b8967a9bd539 (diff)
downloadgem5-2f644efafaa6df54f4e9b8f2710aa6f3647b6940.tar.xz
Fixed some void functions with returns, first stab at cpu ports.
cpu/simple/cpu.hh: Adding port definitions to simple cpu, still needs work. mem/bus.hh: no return for void functions --HG-- extra : convert_revision : 42e5bc16af187d3a46eb25a15b600a8a11b88cc5
Diffstat (limited to 'cpu')
-rw-r--r--cpu/simple/cpu.hh34
1 files changed, 34 insertions, 0 deletions
diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh
index 0f7251237..30fea0f86 100644
--- a/cpu/simple/cpu.hh
+++ b/cpu/simple/cpu.hh
@@ -63,6 +63,40 @@ namespace Trace {
class SimpleCPU : public BaseCPU
{
+ class CpuPort : public Port
+ {
+
+ SimpleCPU *cpu;
+
+ public:
+
+ CpuPort(SimpleCPU *_cpu)
+ : cpu(_cpu)
+ { }
+
+ protected:
+
+ virtual bool recvTiming(Packet &pkt)
+ { return cpu->recvTiming(pkt); }
+
+ virtual Tick recvAtomic(Packet &pkt)
+ { return cpu->recvAtomic(pkt); }
+
+ virtual void recvFunctional(Packet &pkt)
+ { cpu->recvFunctional(pkt); }
+
+ virtual void recvStatusChange(Status status)
+ { cpu->recvStatusChange(status); }
+
+ };
+
+ CpuPort icache_port;
+ CpuPort dcache_port;
+
+ bool recvTiming(Packet &pkt);
+ Tick recvAtomic(Packet &pkt);
+ void recvFunctional(Packet &pkt);
+
public:
// main simulation loop (one cycle)
void tick();