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authorSteve Reinhardt <stever@eecs.umich.edu>2005-05-20 17:13:37 -0400
committerSteve Reinhardt <stever@eecs.umich.edu>2005-05-20 17:13:37 -0400
commit9725c13a0b0e444c996f27b55aa0d5e6570fab97 (patch)
tree0b56479563a922b851a4cfad64eb81d6862549d6 /cpu
parentc2fcac7c0dd8dff182cb262bdf35d5c67117aa42 (diff)
downloadgem5-9725c13a0b0e444c996f27b55aa0d5e6570fab97.tar.xz
Minor changes to get new cpu to compile with FULL_SYSTEM.
cpu/beta_cpu/full_cpu.hh: Make cpu_id protected rather than private so derived classes can access it. cpu/beta_cpu/regfile.hh: Get rid of troublesome debugging statement. --HG-- extra : convert_revision : ae1f841697ea8d736579b8278eaf8fc6bdf3b6c5
Diffstat (limited to 'cpu')
-rw-r--r--cpu/beta_cpu/full_cpu.hh2
-rw-r--r--cpu/beta_cpu/regfile.hh5
2 files changed, 1 insertions, 6 deletions
diff --git a/cpu/beta_cpu/full_cpu.hh b/cpu/beta_cpu/full_cpu.hh
index a7916f9ae..42370f1e7 100644
--- a/cpu/beta_cpu/full_cpu.hh
+++ b/cpu/beta_cpu/full_cpu.hh
@@ -40,7 +40,7 @@ class BaseFullCPU : public BaseCPU
BaseFullCPU(Params &params);
#endif // FULL_SYSTEM
- private:
+ protected:
int cpu_id;
};
diff --git a/cpu/beta_cpu/regfile.hh b/cpu/beta_cpu/regfile.hh
index d7664707d..b88a33bfb 100644
--- a/cpu/beta_cpu/regfile.hh
+++ b/cpu/beta_cpu/regfile.hh
@@ -428,11 +428,6 @@ PhysRegFile<Impl>::setIpr(int idx, uint64_t val)
break;
case ISA::IPR_IPLR:
-#ifdef DEBUG
- if (break_ipl != -1 && break_ipl == (val & 0x1f))
- debug_break();
-#endif
-
// only write least significant five bits - interrupt level
ipr[idx] = val & 0x1f;
break;