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authorKevin Lim <ktlim@umich.edu>2005-01-18 13:02:47 -0500
committerKevin Lim <ktlim@umich.edu>2005-01-18 13:02:47 -0500
commitaed3e6780a54f2d4f008a8cf7f66e2bbdc788a0d (patch)
treef48c9d361d04cc6276ef33a9898eb0ac61de36d7 /cpu
parent783f701247a1013a32d7caab324660c211215a11 (diff)
parentf31a27a030d2e93fef2934aa8642609bb38974af (diff)
downloadgem5-aed3e6780a54f2d4f008a8cf7f66e2bbdc788a0d.tar.xz
Merge changes to make m5 g++ 3.4 compatible.
sim/param.cc: Merge changes. --HG-- extra : convert_revision : b5044e1f7c48ae2d74d5233dd4fabfb7a801d7c8
Diffstat (limited to 'cpu')
-rw-r--r--cpu/base_cpu.cc4
-rw-r--r--cpu/simple_cpu/simple_cpu.cc9
-rw-r--r--cpu/simple_cpu/simple_cpu.hh19
-rw-r--r--cpu/static_inst.cc2
-rw-r--r--cpu/static_inst.hh2
5 files changed, 20 insertions, 16 deletions
diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc
index 7605ff3c3..c4bb97ff8 100644
--- a/cpu/base_cpu.cc
+++ b/cpu/base_cpu.cc
@@ -76,7 +76,7 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
maxThreadsPerCPU = number_of_threads;
// allocate per-thread instruction-based event queues
- comInstEventQueue = new (EventQueue *)[number_of_threads];
+ comInstEventQueue = new EventQueue *[number_of_threads];
for (int i = 0; i < number_of_threads; ++i)
comInstEventQueue[i] = new EventQueue("instruction-based event queue");
@@ -101,7 +101,7 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
}
// allocate per-thread load-based event queues
- comLoadEventQueue = new (EventQueue *)[number_of_threads];
+ comLoadEventQueue = new EventQueue *[number_of_threads];
for (int i = 0; i < number_of_threads; ++i)
comLoadEventQueue[i] = new EventQueue("load-based event queue");
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index d48f93663..e3cce28ae 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -74,6 +74,15 @@
using namespace std;
+template<typename T>
+void
+SimpleCPU::trace_data(T data) {
+ if (traceData) {
+ traceData->setData(data);
+ }
+}
+
+
SimpleCPU::TickEvent::TickEvent(SimpleCPU *c)
: Event(&mainEventQueue, CPU_Tick_Pri), cpu(c), multiplier(1)
{
diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh
index 341a0da23..9b6e2423b 100644
--- a/cpu/simple_cpu/simple_cpu.hh
+++ b/cpu/simple_cpu/simple_cpu.hh
@@ -26,15 +26,15 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __SIMPLE_CPU_HH__
-#define __SIMPLE_CPU_HH__
+#ifndef __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__
+#define __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__
-#include "cpu/base_cpu.hh"
-#include "sim/eventq.hh"
-#include "cpu/pc_event.hh"
#include "base/statistics.hh"
+#include "cpu/base_cpu.hh"
#include "cpu/exec_context.hh"
+#include "cpu/pc_event.hh"
#include "cpu/static_inst.hh"
+#include "sim/eventq.hh"
// forward declarations
#ifdef FULL_SYSTEM
@@ -103,12 +103,7 @@ class SimpleCPU : public BaseCPU
private:
Trace::InstRecord *traceData;
template<typename T>
- void trace_data(T data) {
- if (traceData) {
- traceData->setData(data);
- }
- };
-
+ void trace_data(T data);
public:
//
enum Status {
@@ -346,4 +341,4 @@ class SimpleCPU : public BaseCPU
ExecContext *xcBase() { return xc; }
};
-#endif // __SIMPLE_CPU_HH__
+#endif // __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__
diff --git a/cpu/static_inst.cc b/cpu/static_inst.cc
index 4cb45a818..7069d89ec 100644
--- a/cpu/static_inst.cc
+++ b/cpu/static_inst.cc
@@ -85,4 +85,4 @@ StaticInst<ISA>::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt)
// force instantiation of template function(s) above
-template StaticInst<AlphaISA>;
+template class StaticInst<AlphaISA>;
diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh
index 46b2e4b19..c442ada35 100644
--- a/cpu/static_inst.hh
+++ b/cpu/static_inst.hh
@@ -456,7 +456,7 @@ class StaticInstPtr : public RefCountingPtr<StaticInst<ISA> >
/// Convert to pointer to StaticInstBase class.
operator const StaticInstBasePtr()
{
- return get();
+ return this->get();
}
};