diff options
author | Nathan Binkert <binkertn@umich.edu> | 2004-05-21 13:03:17 -0400 |
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committer | Nathan Binkert <binkertn@umich.edu> | 2004-05-21 13:03:17 -0400 |
commit | b4405682d9f0d7bd01ff461a7e457f8dbbfff1a0 (patch) | |
tree | 95047a24c7b3a0be93afb2a723f13abd07666745 /cpu | |
parent | 47604c8c89539df9aa27b7ba5c4523f27a8ec243 (diff) | |
download | gem5-b4405682d9f0d7bd01ff461a7e457f8dbbfff1a0.tar.xz |
Change the namespace Statistics to Stats
--HG--
extra : convert_revision : 3084b292bbe2e8a392af8e99a31763ca0b0a9467
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/base_cpu.cc | 2 | ||||
-rw-r--r-- | cpu/base_cpu.hh | 2 | ||||
-rw-r--r-- | cpu/exec_context.cc | 2 | ||||
-rw-r--r-- | cpu/memtest/memtest.cc | 2 | ||||
-rw-r--r-- | cpu/memtest/memtest.hh | 6 | ||||
-rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 2 | ||||
-rw-r--r-- | cpu/simple_cpu/simple_cpu.hh | 12 |
7 files changed, 14 insertions, 14 deletions
diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index 624023f0a..702a9afe8 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -130,7 +130,7 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, void BaseCPU::regStats() { - using namespace Statistics; + using namespace Stats; numCycles .name(name() + ".numCycles") diff --git a/cpu/base_cpu.hh b/cpu/base_cpu.hh index c4826cf15..9c4026784 100644 --- a/cpu/base_cpu.hh +++ b/cpu/base_cpu.hh @@ -167,7 +167,7 @@ class BaseCPU : public SimObject public: // Number of CPU cycles simulated - Statistics::Scalar<> numCycles; + Stats::Scalar<> numCycles; }; #endif // __BASE_CPU_HH__ diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index a89cf4bb5..7f7719bf0 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -128,7 +128,7 @@ ExecContext::serialize(ostream &os) SERIALIZE_SCALAR(ctx); } if (system->bin) { - Statistics::MainBin *cur = Statistics::MainBin::curBin(); + Stats::MainBin *cur = Stats::MainBin::curBin(); string bin_name = cur->name(); SERIALIZE_SCALAR(bin_name); } diff --git a/cpu/memtest/memtest.cc b/cpu/memtest/memtest.cc index 5d608976d..1d745724f 100644 --- a/cpu/memtest/memtest.cc +++ b/cpu/memtest/memtest.cc @@ -186,7 +186,7 @@ MemTest::completeRequest(MemReqPtr &req, uint8_t *data) void MemTest::regStats() { - using namespace Statistics; + using namespace Stats; numReadsStat diff --git a/cpu/memtest/memtest.hh b/cpu/memtest/memtest.hh index f2409d54c..4bde5c066 100644 --- a/cpu/memtest/memtest.hh +++ b/cpu/memtest/memtest.hh @@ -111,9 +111,9 @@ class MemTest : public BaseCPU Tick noResponseCycles; uint64_t numReads; - Statistics::Scalar<> numReadsStat; - Statistics::Scalar<> numWritesStat; - Statistics::Scalar<> numCopiesStat; + Stats::Scalar<> numReadsStat; + Stats::Scalar<> numWritesStat; + Stats::Scalar<> numCopiesStat; // called by MemCompleteEvent::process() void completeRequest(MemReqPtr &req, uint8_t *data); diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 617c91e68..765507345 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -254,7 +254,7 @@ SimpleCPU::haltContext(int thread_num) void SimpleCPU::regStats() { - using namespace Statistics; + using namespace Stats; BaseCPU::regStats(); diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 0c7204fcd..1c6b18d03 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -210,7 +210,7 @@ class SimpleCPU : public BaseCPU // number of simulated instructions Counter numInst; Counter startNumInst; - Statistics::Scalar<> numInsts; + Stats::Scalar<> numInsts; virtual Counter totalInstructions() const { @@ -218,22 +218,22 @@ class SimpleCPU : public BaseCPU } // number of simulated memory references - Statistics::Scalar<> numMemRefs; + Stats::Scalar<> numMemRefs; // number of simulated loads Counter numLoad; Counter startNumLoad; // number of idle cycles - Statistics::Average<> notIdleFraction; - Statistics::Formula idleFraction; + Stats::Average<> notIdleFraction; + Stats::Formula idleFraction; // number of cycles stalled for I-cache misses - Statistics::Scalar<> icacheStallCycles; + Stats::Scalar<> icacheStallCycles; Counter lastIcacheStall; // number of cycles stalled for D-cache misses - Statistics::Scalar<> dcacheStallCycles; + Stats::Scalar<> dcacheStallCycles; Counter lastDcacheStall; void processCacheCompletion(); |