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| author | Nathan Binkert <binkertn@umich.edu> | 2003-10-14 16:53:52 -0400 |
|---|---|---|
| committer | Nathan Binkert <binkertn@umich.edu> | 2003-10-14 16:53:52 -0400 |
| commit | 638a07d15a149b48c854b58e2b3f4df097aa5e2e (patch) | |
| tree | 82ac6aa2e2df719eeb2c8b6d319c4c7956bbc6b1 /dev/alpha_console.cc | |
| parent | 2ac3dc5aa184da9fa08a304c67d646197ed9a7c5 (diff) | |
| parent | 4759c203c774ef42a2a35832e220a95cffb5fa7b (diff) | |
| download | gem5-638a07d15a149b48c854b58e2b3f4df097aa5e2e.tar.xz | |
Merge
cpu/pc_event.cc:
SCCS merged
--HG--
extra : convert_revision : f7046f2bf6053be9b00150390fabe3d4f82b0981
Diffstat (limited to 'dev/alpha_console.cc')
| -rw-r--r-- | dev/alpha_console.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index e2de5f7ac..526ef0b3c 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -153,7 +153,7 @@ AlphaConsole::write(MemReqPtr req, const uint8_t *data) int cpu = val; assert(cpu > 0 && "Must not access primary cpu"); - ExecContext *other_xc = req->xc->system->xc_array[cpu]; + ExecContext *other_xc = req->xc->system->xcvec[cpu]; other_xc->regs.intRegFile[16] = cpu; other_xc->regs.ipr[TheISA::IPR_PALtemp16] = cpu; other_xc->regs.intRegFile[0] = cpu; |