diff options
author | Nathan Binkert <binkertn@umich.edu> | 2004-02-11 16:07:55 -0500 |
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committer | Nathan Binkert <binkertn@umich.edu> | 2004-02-11 16:07:55 -0500 |
commit | cc53465cd5b48183936278cda617be68a4520ff5 (patch) | |
tree | e95f5dab32095eff25cdfc0bcfbaecb77ef0fe80 /dev/alpha_console.cc | |
parent | 5e82f8d84c4d8a8ec4ce914f02328a068ea2cacc (diff) | |
download | gem5-cc53465cd5b48183936278cda617be68a4520ff5.tar.xz |
Add support for all devices to get requests from a timing memory bus.
In the future, this can be used for actual data, but for now, it's
so that devices can respond to timing accesses properly. This way,
an uncached access on a bus further away will take longer to respond.
dev/alpha_console.cc:
dev/alpha_console.hh:
suport the separate IO bus
--HG--
extra : convert_revision : ececb70f5febfd00231f6e406f93b2a79be01261
Diffstat (limited to 'dev/alpha_console.cc')
-rw-r--r-- | dev/alpha_console.cc | 31 |
1 files changed, 26 insertions, 5 deletions
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 2dc939b97..85b4d57f2 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -43,6 +43,9 @@ #include "dev/console.hh" #include "dev/simple_disk.hh" #include "dev/tlaser_clock.hh" +#include "mem/bus/bus.hh" +#include "mem/bus/pio_interface.hh" +#include "mem/bus/pio_interface_impl.hh" #include "mem/functional_mem/memory_control.hh" #include "sim/builder.hh" #include "sim/system.hh" @@ -51,11 +54,18 @@ using namespace std; AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, System *system, BaseCPU *cpu, TlaserClock *clock, - int num_cpus, MemoryController *mmu, Addr a) - : FunctionalMemory(name), disk(d), console(cons), addr(a) + int num_cpus, MemoryController *mmu, Addr a, + HierParams *hier, Bus *bus) + : PioDevice(name), disk(d), console(cons), addr(a) { mmu->add_child(this, Range<Addr>(addr, addr + size)); + if (bus) { + pioInterface = newPioInterface(name, hier, bus, this, + &AlphaConsole::cacheAccess); + pioInterface->setAddrRange(addr, addr + size); + } + consoleData = new uint8_t[size]; memset(consoleData, 0, size); @@ -183,6 +193,12 @@ AlphaConsole::write(MemReqPtr &req, const uint8_t *data) return No_Fault; } +Tick +AlphaConsole::cacheAccess(MemReqPtr &req) +{ + return curTick + 1000; +} + void AlphaAccess::serialize(ostream &os) { @@ -251,6 +267,8 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) SimObjectParam<System *> system; SimObjectParam<BaseCPU *> cpu; SimObjectParam<TlaserClock *> clock; + SimObjectParam<Bus*> io_bus; + SimObjectParam<HierParams *> hier; END_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) @@ -263,14 +281,17 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole) INIT_PARAM(addr, "Device Address"), INIT_PARAM(system, "system object"), INIT_PARAM(cpu, "Processor"), - INIT_PARAM(clock, "Turbolaser Clock") + INIT_PARAM(clock, "Turbolaser Clock"), + INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL), + INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams) END_INIT_SIM_OBJECT_PARAMS(AlphaConsole) CREATE_SIM_OBJECT(AlphaConsole) { - return new AlphaConsole(getInstanceName(), sim_console, disk, - system, cpu, clock, num_cpus, mmu, addr); + return new AlphaConsole(getInstanceName(), sim_console, disk, + system, cpu, clock, num_cpus, mmu, + addr, hier, io_bus); } REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole) |