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authorKorey Sewell <ksewell@umich.edu>2006-02-16 02:40:04 -0500
committerKorey Sewell <ksewell@umich.edu>2006-02-16 02:40:04 -0500
commite7d16b0aefec6543817762b6e5e389372a11b53c (patch)
tree2e90bf447049ece5fb234bfaf44c50515388744e /dev/alpha_console.cc
parent7c9ea671aff141bc0a3e7acc892794e7e8181cf3 (diff)
parent00f451cc02373a22023f1e32ba3823a1d07adb42 (diff)
downloadgem5-e7d16b0aefec6543817762b6e5e389372a11b53c.tar.xz
Merge zizzer:/bk/multiarch
into zazzer.eecs.umich.edu:/z/ksewell/research/m5-sim/m5-multiarch --HG-- extra : convert_revision : 17b164847aee7e21d15d1a9d99aae43f46906c28
Diffstat (limited to 'dev/alpha_console.cc')
-rw-r--r--dev/alpha_console.cc14
1 files changed, 7 insertions, 7 deletions
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index 61b444628..38fbbdef0 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -99,7 +99,7 @@ AlphaConsole::startup()
alphaAccess->intrClockFrequency = platform->intrFrequency();
}
-Fault
+Fault *
AlphaConsole::read(MemReqPtr &req, uint8_t *data)
{
memset(data, 0, req->size);
@@ -183,13 +183,13 @@ AlphaConsole::read(MemReqPtr &req, uint8_t *data)
}
break;
default:
- return Machine_Check_Fault;
+ return MachineCheckFault;
}
- return No_Fault;
+ return NoFault;
}
-Fault
+Fault *
AlphaConsole::write(MemReqPtr &req, const uint8_t *data)
{
uint64_t val;
@@ -203,7 +203,7 @@ AlphaConsole::write(MemReqPtr &req, const uint8_t *data)
val = *(uint64_t *)data;
break;
default:
- return Machine_Check_Fault;
+ return MachineCheckFault;
}
Addr daddr = req->paddr - (addr & EV5::PAddrImplMask);
@@ -256,10 +256,10 @@ AlphaConsole::write(MemReqPtr &req, const uint8_t *data)
break;
default:
- return Machine_Check_Fault;
+ return MachineCheckFault;
}
- return No_Fault;
+ return NoFault;
}
Tick