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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2003-12-10 17:47:28 -0800 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2003-12-10 17:47:28 -0800 |
| commit | 4ce6118fdac16cfdc0d945e8793ace3379779288 (patch) | |
| tree | 73d1b9ca10a321d4b022177396262a9386a36f42 /dev/alpha_console.cc | |
| parent | db6038937d126ec11e7745a1182c69f79b92f41f (diff) | |
| download | gem5-4ce6118fdac16cfdc0d945e8793ace3379779288.tar.xz | |
Factor ExecContext::setStatus(), BaseCPU::execCtxStatusChange(),
and SimpleCPU::setStatus() into separate functions. For example,
setStatus(Active) is now activate().
--HG--
extra : convert_revision : 4392e07caf6c918db0b535f613175109681686fe
Diffstat (limited to 'dev/alpha_console.cc')
| -rw-r--r-- | dev/alpha_console.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 6fe57edb5..268370b0e 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -158,7 +158,7 @@ AlphaConsole::write(MemReqPtr req, const uint8_t *data) other_xc->regs.ipr[TheISA::IPR_PALtemp16] = cpu; other_xc->regs.intRegFile[0] = cpu; other_xc->regs.intRegFile[30] = alphaAccess->bootStrapImpure; - other_xc->setStatus(ExecContext::Active); //Start the cpu + other_xc->activate(); //Start the cpu return No_Fault; } |