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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-03-09 18:35:28 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-03-09 18:35:28 -0500 |
| commit | 872bbdfc33cb82bf32576db3a57d3055a04acbac (patch) | |
| tree | 837dd214bd682ac7efa515b18857bec7d4d35bef /dev/ide_ctrl.cc | |
| parent | 3adb45144aca819c9796168ecde7a263169d9d4d (diff) | |
| parent | 7b283dbc090d1197593b00fd1279b92f7c2e693e (diff) | |
| download | gem5-872bbdfc33cb82bf32576db3a57d3055a04acbac.tar.xz | |
Hand merge. Stuff probably doesn't compile.
--HG--
rename : arch/alpha/isa_desc => arch/alpha/isa/main.isa
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux/process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux/process.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64/process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64/process.hh
rename : cpu/exec_context.cc => cpu/cpu_exec_context.cc
rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh
extra : convert_revision : 7d1efcedd708815d985a951f6f010fbd83dc27e8
Diffstat (limited to 'dev/ide_ctrl.cc')
| -rw-r--r-- | dev/ide_ctrl.cc | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc index 1279efc82..56682a224 100644 --- a/dev/ide_ctrl.cc +++ b/dev/ide_ctrl.cc @@ -48,6 +48,7 @@ #include "sim/sim_object.hh" using namespace std; +using namespace TheISA; //// // Initialization and destruction @@ -401,7 +402,7 @@ IdeController::read(MemReqPtr &req, uint8_t *data) parseAddr(req->paddr, offset, channel, reg_type); if (!io_enabled) - return No_Fault; + return NoFault; switch (reg_type) { case BMI_BLOCK: @@ -457,7 +458,7 @@ IdeController::read(MemReqPtr &req, uint8_t *data) DPRINTF(IdeCtrl, "read from offset: %#x size: %#x data: %#x\n", offset, req->size, *(uint32_t*)data); - return No_Fault; + return NoFault; } Fault @@ -472,12 +473,12 @@ IdeController::write(MemReqPtr &req, const uint8_t *data) parseAddr(req->paddr, offset, channel, reg_type); if (!io_enabled) - return No_Fault; + return NoFault; switch (reg_type) { case BMI_BLOCK: if (!bm_enabled) - return No_Fault; + return NoFault; switch (offset) { // Bus master IDE command register @@ -627,7 +628,7 @@ IdeController::write(MemReqPtr &req, const uint8_t *data) DPRINTF(IdeCtrl, "write to offset: %#x size: %#x data: %#x\n", offset, req->size, *(uint32_t*)data); - return No_Fault; + return NoFault; } //// |