diff options
author | Andrew Schultz <alschult@umich.edu> | 2004-06-01 17:19:47 -0400 |
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committer | Andrew Schultz <alschult@umich.edu> | 2004-06-01 17:19:47 -0400 |
commit | 7bbb00d80f632db5b82058b4cecfe5082e288109 (patch) | |
tree | cd821c6c8c94b8d7da09625c98b82bf055edbf31 /dev/ide_disk.hh | |
parent | ac27e69ef9e8d0791bd62f2f912f51f22529a32b (diff) | |
download | gem5-7bbb00d80f632db5b82058b4cecfe5082e288109.tar.xz |
Fixes to the state machine to properly support software reset and to fix
PIO writes. This was mainly related to not shadowing the status register
properly, and also not setting some of the status bits expected by the
operating system for the PIO write protocol.
--HG--
extra : convert_revision : fcdfd588be6e4f237aa6057889f0b3bdf4ea7631
Diffstat (limited to 'dev/ide_disk.hh')
-rw-r--r-- | dev/ide_disk.hh | 35 |
1 files changed, 24 insertions, 11 deletions
diff --git a/dev/ide_disk.hh b/dev/ide_disk.hh index 35e7404d5..eb8c8a047 100644 --- a/dev/ide_disk.hh +++ b/dev/ide_disk.hh @@ -94,6 +94,8 @@ class PrdTableEntry { #define STATUS_BSY_BIT 0x80 #define STATUS_DRDY_BIT 0x40 #define STATUS_DRQ_BIT 0x08 +#define STATUS_SEEK_BIT 0x10 +#define STATUS_DF_BIT 0x20 #define DRIVE_LBA_BIT 0x40 #define DEV0 (0) @@ -114,10 +116,7 @@ typedef struct CommandReg { uint8_t drive; uint8_t head; }; - union { - uint8_t status; - uint8_t command; - }; + uint8_t command; } CommandReg_t; typedef enum Events { @@ -135,6 +134,7 @@ typedef enum DevAction { ACT_CMD_WRITE, ACT_CMD_COMPLETE, ACT_CMD_ERROR, + ACT_SELECT_WRITE, ACT_STAT_READ, ACT_DATA_READY, ACT_DATA_READ_BYTE, @@ -142,7 +142,9 @@ typedef enum DevAction { ACT_DATA_WRITE_BYTE, ACT_DATA_WRITE_SHORT, ACT_DMA_READY, - ACT_DMA_DONE + ACT_DMA_DONE, + ACT_SRST_SET, + ACT_SRST_CLEAR } DevAction_t; typedef enum DevState { @@ -151,6 +153,9 @@ typedef enum DevState { Device_Idle_SI, Device_Idle_NS, + // Software reset + Device_Srst, + // Non-data commands Command_Execution, @@ -202,6 +207,8 @@ class IdeDisk : public SimObject struct hd_driveid driveID; /** Data buffer for transfers */ uint8_t *dataBuffer; + /** Number of bytes in command data transfer */ + uint32_t cmdBytes; /** Number of bytes left in command data transfer */ uint32_t cmdBytesLeft; /** Number of bytes left in DRQ block */ @@ -210,8 +217,8 @@ class IdeDisk : public SimObject uint32_t curSector; /** Command block registers */ CommandReg_t cmdReg; - /** Shadow of the current command code */ - uint8_t curCommand; + /** Status register */ + uint8_t status; /** Interrupt enable bit */ bool nIENBit; /** Device state */ @@ -249,6 +256,11 @@ class IdeDisk : public SimObject ~IdeDisk(); /** + * Reset the device state + */ + void reset(int id); + + /** * Set the controller for this device * @param c The IDE controller */ @@ -306,17 +318,18 @@ class IdeDisk : public SimObject void updateState(DevAction_t action); // Utility functions - bool isBSYSet() { return (cmdReg.status & STATUS_BSY_BIT); } + bool isBSYSet() { return (status & STATUS_BSY_BIT); } bool isIENSet() { return nIENBit; } bool isDEVSelect() { return ((cmdReg.drive & SELECT_DEV_BIT) == devID); } void setComplete() { // clear out the status byte - cmdReg.status = 0; - + status = 0; // set the DRDY bit - cmdReg.status |= STATUS_DRDY_BIT; + status |= STATUS_DRDY_BIT; + // set the SEEK bit + status |= STATUS_SEEK_BIT; } uint32_t getLBABase() |