diff options
| author | Ali Saidi <saidi@eecs.umich.edu> | 2004-10-25 18:15:28 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2004-10-25 18:15:28 -0400 |
| commit | be0184b463056645d97598dfc98292f75e579b1a (patch) | |
| tree | 9d780c3c804b42fc40e680994ff248af4c4b58c3 /dev/ns_gige.cc | |
| parent | d55eb90fc73e27d26e64daa4c69efc3beee00429 (diff) | |
| parent | 3402411661caff075890c20a6c59fa471d5e68ac (diff) | |
| download | gem5-be0184b463056645d97598dfc98292f75e579b1a.tar.xz | |
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-smp
--HG--
extra : convert_revision : 59173b5d4599cfe1cbaa96705e9731ee5a8d8647
Diffstat (limited to 'dev/ns_gige.cc')
| -rw-r--r-- | dev/ns_gige.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc index 2b19cebe9..4d0b93ab9 100644 --- a/dev/ns_gige.cc +++ b/dev/ns_gige.cc @@ -1029,7 +1029,7 @@ NSGigE::cpuInterrupt() cpuPendingIntr = true; DPRINTF(EthernetIntr, "posting cchip interrupt\n"); - tsunami->cchip->postDRIR(configData->config.hdr.pci0.interruptLine); + tsunami->postPciInt(configData->config.hdr.pci0.interruptLine); } } @@ -1049,7 +1049,7 @@ NSGigE::cpuIntrClear() cpuPendingIntr = false; DPRINTF(EthernetIntr, "clearing cchip interrupt\n"); - tsunami->cchip->clearDRIR(configData->config.hdr.pci0.interruptLine); + tsunami->clearPciInt(configData->config.hdr.pci0.interruptLine); } bool |