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authorAndrew Schultz <alschult@umich.edu>2004-06-04 15:12:27 -0400
committerAndrew Schultz <alschult@umich.edu>2004-06-04 15:12:27 -0400
commitd270ea851a92e98d3efe30774f31f935d846dcd3 (patch)
treed98e78985475699374e471dfbd689bb79587732d /dev/ns_gige.hh
parent0408051f201cb5b19c4f8d5ec1d6e96de4a9aa3f (diff)
downloadgem5-d270ea851a92e98d3efe30774f31f935d846dcd3.tar.xz
Changes to support serialization with PCI devices
dev/ide_ctrl.cc: Properly serialize/unserialize the PciDev base class to get it to remap the MMU dev/ns_gige.cc: dev/ns_gige.hh: Remove the "addr" paramter from the constructor and change the device to use PCI based MMU mappings only dev/pciconfigall.cc: Change comments dev/pcidev.cc: Properly setup the MMU after a serialize --HG-- extra : convert_revision : 4b2e7ba58e3c24fac1ff6f80635e704d6ecc0eff
Diffstat (limited to 'dev/ns_gige.hh')
-rw-r--r--dev/ns_gige.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/dev/ns_gige.hh b/dev/ns_gige.hh
index ff648adcf..de8d93c70 100644
--- a/dev/ns_gige.hh
+++ b/dev/ns_gige.hh
@@ -345,7 +345,7 @@ class NSGigE : public PciDev
bool dma_data_free, Tick dma_read_delay, Tick dma_write_delay,
Tick dma_read_factor, Tick dma_write_factor, PciConfigAll *cf,
PciConfigData *cd, Tsunami *t, uint32_t bus, uint32_t dev,
- uint32_t func, bool rx_filter, const int eaddr[6], Addr addr);
+ uint32_t func, bool rx_filter, const int eaddr[6]);
~NSGigE();
virtual void WriteConfig(int offset, int size, uint32_t data);