l

base/traceflags.py:
    added some more traceflags for ethernet to break it up better
dev/etherpkt.hh:
    since we are not network host order, must reverse bytes for these typechecks.

    also, overload isTcp/UdpPkt to take an argument so you don't have to reget the ip header if you've already got one.
dev/ns_gige.cc:
    1) add some functions that reverse Endianness so we can generate adn evaluate checksum adn dprintf data accurately/more understandably

    2) forget about the implementation of fifo fill/drain thresholds, it's not used by the driver much, nor does it matter with use sending/receiving in whole packets anyway.
    get rid of teh associated variables.

    3) get rid of txFifoCnt the variable, it's redundant and unnecessary, just use txFifoAvail.

    4) change io_enable to ioEnable, just to be picky.

    5) modify some DPRINTF's to be clearer, also added a lot, and spread them into better traceflag categories

    6) fix the device bug!  it's the intrTick = 0 at teh beginning of cpuInterrupt().

    7) clear some bools in regsReset() so they don't holdover wrong state

    8) fix pseudo header generation for Tcp checksumming to account for network order
dev/ns_gige.hh:
    change io_enable to ioEnable, get rid of fill/drain thresh related variables and txFifoCnt, which is redundant

--HG--
extra : convert_revision : c538b75731f3c9e04354f57e6df9a40aeca5096d

1 files changed, 3 insertions, 6 deletions

diff --git a/dev/ns_gige.hh b/dev/ns_gige.hh
index 25a7781e5..191c867ce 100644
--- a/dev/ns_gige.hh
+++ b/dev/ns_gige.hh
@@ -159,10 +159,10 @@ class NSGigE : public PciDev
     dp_rom rom;
 
     /** pci settings */
-    bool io_enable;
+    bool ioEnable;
 #if 0
-    bool mem_enable;
-    bool bm_enable;
+    bool memEnable;
+    bool bmEnable;
 #endif
 
     /*** BASIC STRUCTURES FOR TX/RX ***/
@@ -177,7 +177,6 @@ class NSGigE : public PciDev
     uint8_t *rxPacketBufPtr;
     uint32_t txXferLen;
     uint32_t rxXferLen;
-    uint32_t txPktXmitted;
     bool rxDmaFree;
     bool txDmaFree;
 
@@ -189,8 +188,6 @@ class NSGigE : public PciDev
     TxState txState;
     /** Current Transmit Descriptor Done */
     bool CTDD;
-    /** amt of data in the txDataFifo in bytes (logical) */
-    uint32_t txFifoCnt;
     /** current amt of free space in txDataFifo in bytes */
     uint32_t txFifoAvail;
     /** halt the tx state machine after next packet */