Fixes for detailed boot, made cttz and ctlz instructions more compact,

and started cleaning up config files.

arch/alpha/isa_desc:
    Made implementation of cttz and ctlz more compact
base/remote_gdb.cc:
    Added comment about PALcode debugger accesses
dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
    Cleaned up includes and changed device from FunctionalMemory to
    PioDevice for detailed boot
dev/ns_gige.cc:
    The ethernet dev uses two BARs, and the first bars size was being set
    incorrectly.
dev/tsunamireg.h:
    I don't know why we were using the superpage as the PCI memory addr.
    Changed and works correctly with detailed boot.

--HG--
extra : convert_revision : b535e76612cb90b544305dc1aa8c5e0e774564bd

1 files changed, 14 insertions, 3 deletions

diff --git a/dev/pciconfigall.hh b/dev/pciconfigall.hh
index 7356e7279..356e62a3c 100644
--- a/dev/pciconfigall.hh
+++ b/dev/pciconfigall.hh
@@ -34,8 +34,10 @@
 #ifndef __PCICONFIGALL_HH__
 #define __PCICONFIGALL_HH__
 
-#include "mem/functional_mem/functional_memory.hh"
 #include "dev/pcireg.h"
+#include "base/range.hh"
+#include "dev/io_device.hh"
+
 
 static const uint32_t MAX_PCI_DEV = 32;
 static const uint32_t MAX_PCI_FUNC = 8;
@@ -49,7 +51,7 @@ class PciDev;
  * space and passes the requests on to TsunamiPCIDev devices as
  * appropriate.
  */
-class PciConfigAll : public FunctionalMemory
+class PciConfigAll : public PioDevice
 {
   private:
     Addr addr;
@@ -67,8 +69,11 @@ class PciConfigAll : public FunctionalMemory
      * @param name name of the object
      * @param a base address of the write
      * @param mmu the memory controller
+     * @param hier object to store parameters universal the device hierarchy
+     * @param bus The bus that this device is attached to
      */
-    PciConfigAll(const std::string &name, Addr a, MemoryController *mmu);
+    PciConfigAll(const std::string &name, Addr a, MemoryController *mmu,
+                 HierParams *hier, Bus *bus);
 
 
     /**
@@ -123,6 +128,12 @@ class PciConfigAll : public FunctionalMemory
      */
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 
+    /**
+     * Return how long this access will take.
+     * @param req the memory request to calcuate
+     * @return Tick when the request is done
+     */
+    Tick cacheAccess(MemReqPtr &req);
 };
 
 #endif // __PCICONFIGALL_HH__