Add a bunch of functions to manage the BAR addresses. This

makes it easier to implement PCI device models.

dev/pcidev.cc:
    default implementations for read/write and readBarX/writeBarX functions

--HG--
extra : convert_revision : bbe2e2a2a506e2dd94d98f8e0feaefef96380be9

1 files changed, 56 insertions, 0 deletions

diff --git a/dev/pcidev.cc b/dev/pcidev.cc
index dd83b2e21..1d9ea137d 100644
--- a/dev/pcidev.cc
+++ b/dev/pcidev.cc
@@ -70,6 +70,62 @@ PciDev::PciDev(Params *p)
         p->configSpace->registerDevice(p->deviceNum, p->functionNum, this);
 }
 
+Fault
+PciDev::read(MemReqPtr &req, uint8_t *data)
+{ return No_Fault; }
+
+Fault
+PciDev::write(MemReqPtr &req, const uint8_t *data)
+{ return No_Fault; }
+
+Fault
+PciDev::readBar0(MemReqPtr &req, Addr daddr, uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::readBar1(MemReqPtr &req, Addr daddr, uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::readBar2(MemReqPtr &req, Addr daddr, uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::readBar3(MemReqPtr &req, Addr daddr, uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::readBar4(MemReqPtr &req, Addr daddr, uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::readBar5(MemReqPtr &req, Addr daddr, uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::writeBar0(MemReqPtr &req, Addr daddr, const uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::writeBar1(MemReqPtr &req, Addr daddr, const uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::writeBar2(MemReqPtr &req, Addr daddr, const uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::writeBar3(MemReqPtr &req, Addr daddr, const uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::writeBar4(MemReqPtr &req, Addr daddr, const uint8_t *data)
+{ panic("not implemented"); }
+
+Fault
+PciDev::writeBar5(MemReqPtr &req, Addr daddr, const uint8_t *data)
+{ panic("not implemented"); }
+
 void
 PciDev::readConfig(int offset, int size, uint8_t *data)
 {