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authorAndrew Schultz <alschult@umich.edu>2004-02-05 02:25:45 -0500
committerAndrew Schultz <alschult@umich.edu>2004-02-05 02:25:45 -0500
commitdaa579fc0f3aca4e042068862b022095734b41d9 (patch)
tree744e2c54646847ea6474aa338700e7f03e6da785 /dev/pcidev.hh
parent69e1e10f5d940ee06d2c38f3a1b21c9992587f13 (diff)
downloadgem5-daa579fc0f3aca4e042068862b022095734b41d9.tar.xz
Fix PCI code so it builds properly now
dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: dev/tsunami.cc: dev/tsunami.hh: A bunch of changes to clean up new PCI code and to fix build --HG-- extra : convert_revision : 71063bcc565c50fc293b323ddce2c8e701f544ff
Diffstat (limited to 'dev/pcidev.hh')
-rw-r--r--dev/pcidev.hh41
1 files changed, 34 insertions, 7 deletions
diff --git a/dev/pcidev.hh b/dev/pcidev.hh
index ae8368b71..8cb68945a 100644
--- a/dev/pcidev.hh
+++ b/dev/pcidev.hh
@@ -33,10 +33,28 @@
#ifndef __PCI_DEV_HH__
#define __PCI_DEV_HH__
-#include "mem/functional_mem/mmap_device.hh"
#include "dev/pcireg.h"
+#include "sim/sim_object.hh"
+#include "mem/functional_mem/mmap_device.hh"
class PCIConfigAll;
+class MemoryController;
+
+class PciConfigData : public SimObject
+{
+ public:
+ PciConfigData(const std::string &name)
+ : SimObject(name)
+ {
+ memset(config.data, 0, sizeof(config.data));
+ memset(BARAddrs, 0, sizeof(BARAddrs));
+ memset(BARSize, 0, sizeof(BARSize));
+ }
+
+ PCIConfig config;
+ uint32_t BARSize[6];
+ Addr BARAddrs[6];
+};
/**
* PCI device, base implemnation is only config space.
@@ -47,23 +65,32 @@ class PCIConfigAll;
*/
class PciDev : public MmapDevice
{
- private:
+ protected:
+ MemoryController *MMU;
+ PCIConfigAll *ConfigSpace;
+ PciConfigData *ConfigData;
uint32_t Bus;
uint32_t Device;
uint32_t Function;
- public:
- PciDev(const std::string &name, PCIConfigAll *cf, uint32_t bus,
- uint32_t dev, uint32_t func);
- PCIConfigAll *ConfigSpace;
PCIConfig config;
uint32_t BARSize[6];
Addr BARAddrs[6];
+ public:
+ PciDev(const std::string &name, MemoryController *mmu, PCIConfigAll *cf,
+ PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func);
+
+ virtual Fault read(MemReqPtr &req, uint8_t *data) {
+ return No_Fault;
+ }
+ virtual Fault write(MemReqPtr &req, const uint8_t *data) {
+ return No_Fault;
+ }
+
virtual void WriteConfig(int offset, int size, uint32_t data);
virtual void ReadConfig(int offset, int size, uint8_t *data);
-
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);
};