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| author | Benjamin Nash <benash@umich.edu> | 2005-08-15 17:17:17 -0400 |
|---|---|---|
| committer | Benjamin Nash <benash@umich.edu> | 2005-08-15 17:17:17 -0400 |
| commit | bcc333e92006f52baeef1ae0f94d4765513584d8 (patch) | |
| tree | 88e3fbd634750cec0e1e4210d62a1f90fd3d2380 /dev/rtcreg.h | |
| parent | 49063eb24f8fd2ad010224cc282c55dd5471dd65 (diff) | |
| parent | b64eae5e52d9eb60ad498464d076b48cd5ceafe3 (diff) | |
| download | gem5-bcc333e92006f52baeef1ae0f94d4765513584d8.tar.xz | |
Merge zed.eecs.umich.edu:/.automount/fox/y/mserrano/m5_dir/m5
into zed.eecs.umich.edu:/z/benash/bk/m5
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/rtcreg.h:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/uart8250.cc:
dev/uart8250.hh:
python/m5/objects/Tsunami.py:
Merge code.
--HG--
extra : convert_revision : e97d5dbcc051d2061622201265430d359f995d48
Diffstat (limited to 'dev/rtcreg.h')
| -rw-r--r-- | dev/rtcreg.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/dev/rtcreg.h b/dev/rtcreg.h index 032e22ab5..5025a0e95 100644 --- a/dev/rtcreg.h +++ b/dev/rtcreg.h @@ -37,12 +37,12 @@ #define RTC_MON 0x08 #define RTC_YEAR 0x09 -#define RTC_CNTRL_REGA 0x0A +#define RTC_STAT_REGA 0x0A #define RTCA_1024HZ 0x06 /* 1024Hz periodic interrupt frequency */ #define RTCA_32768HZ 0x20 /* 22-stage divider, 32.768KHz timebase */ #define RTCA_UIP 0x80 /* 1 = date and time update in progress */ -#define RTC_CNTRL_REGB 0x0B +#define RTC_STAT_REGB 0x0B #define RTCB_DST 0x01 /* USA Daylight Savings Time enable */ #define RTCB_24HR 0x02 /* 0 = 12 hours, 1 = 24 hours */ #define RTCB_BIN 0x04 /* 0 = BCD, 1 = Binary coded time */ @@ -52,6 +52,6 @@ #define RTCB_PRDC_IE 0x40 /* 1 = enable periodic clock interrupt */ #define RTCB_NO_UPDT 0x80 /* stop clock updates */ -#define RTC_CNTRL_REGC 0x0C -#define RTC_CNTRL_REGD 0x0D +#define RTC_STAT_REGC 0x0C +#define RTC_STAT_REGD 0x0D |