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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-02-21 20:10:40 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-02-21 20:10:40 -0500 |
| commit | 8d80fd1477fa39ebc5bad4ca5c727b2871fd9b8d (patch) | |
| tree | aa785d4b846823e1960c7b308e6de1c90cf6fb3f /dev/sinic.cc | |
| parent | 3f7979c99d8dc4f434e3daa2e179616f1669e16e (diff) | |
| download | gem5-8d80fd1477fa39ebc5bad4ca5c727b2871fd9b8d.tar.xz | |
Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old Fault class renamed.
--HG--
extra : convert_revision : 5b2f457401f8ff94fe39fe071288eb117814b7bb
Diffstat (limited to 'dev/sinic.cc')
| -rw-r--r-- | dev/sinic.cc | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/dev/sinic.cc b/dev/sinic.cc index d175a1796..c499d2f49 100644 --- a/dev/sinic.cc +++ b/dev/sinic.cc @@ -357,11 +357,11 @@ Device::prepareWrite(int cpu, int index) /** * I/O read of device register */ -Fault * +Fault Device::read(MemReqPtr &req, uint8_t *data) { assert(config.command & PCI_CMD_MSE); - Fault * fault = readBar(req, data); + Fault fault = readBar(req, data); if (fault == MachineCheckFault) { panic("address does not map to a BAR pa=%#x va=%#x size=%d", @@ -373,7 +373,7 @@ Device::read(MemReqPtr &req, uint8_t *data) return fault; } -Fault * +Fault Device::readBar0(MemReqPtr &req, Addr daddr, uint8_t *data) { int cpu = (req->xc->regs.ipr[TheISA::IPR_PALtemp16] >> 8) & 0xff; @@ -423,7 +423,7 @@ Device::readBar0(MemReqPtr &req, Addr daddr, uint8_t *data) /** * IPR read of device register */ -Fault * +Fault Device::iprRead(Addr daddr, int cpu, uint64_t &result) { if (!regValid(daddr)) @@ -453,11 +453,11 @@ Device::iprRead(Addr daddr, int cpu, uint64_t &result) /** * I/O write of device register */ -Fault * +Fault Device::write(MemReqPtr &req, const uint8_t *data) { assert(config.command & PCI_CMD_MSE); - Fault * fault = writeBar(req, data); + Fault fault = writeBar(req, data); if (fault == MachineCheckFault) { panic("address does not map to a BAR pa=%#x va=%#x size=%d", @@ -469,7 +469,7 @@ Device::write(MemReqPtr &req, const uint8_t *data) return fault; } -Fault * +Fault Device::writeBar0(MemReqPtr &req, Addr daddr, const uint8_t *data) { int cpu = (req->xc->regs.ipr[TheISA::IPR_PALtemp16] >> 8) & 0xff; |