fullsys now builds and runs for about one cycle

SConscript:
    easier to fix than temporarily remove
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    mem needed for both fullsys and syscall
dev/baddev.cc:
    fix for new mem system
dev/io_device.cc:
    fix typo
dev/io_device.hh:
    PioDevice needs to be a memobject
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
    fix for new mem systems
dev/platform.cc:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
    rather than the platform have a pointer to pciconfig, go the other
    way so all devices are the same and can have a platform pointer
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/uart8250.cc:
python/m5/objects/AlphaConsole.py:
python/m5/objects/BadDevice.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/Device.py:
python/m5/objects/Pci.py:
python/m5/objects/PhysicalMemory.py:
python/m5/objects/System.py:
python/m5/objects/Tsunami.py:
python/m5/objects/Uart.py:
    fixes for newmem

--HG--
extra : convert_revision : b7b67e19095cca64889f6307725aa2f3d84c7105

1 files changed, 1 insertions, 5 deletions

diff --git a/dev/tsunami.hh b/dev/tsunami.hh
index 7fd91d5b2..668c82674 100644
--- a/dev/tsunami.hh
+++ b/dev/tsunami.hh
@@ -38,12 +38,9 @@
 #include "dev/platform.hh"
 
 class IdeController;
-class TlaserClock;
-class NSGigE;
 class TsunamiCChip;
 class TsunamiPChip;
 class TsunamiIO;
-class PciConfigAll;
 class System;
 
 /**
@@ -86,8 +83,7 @@ class Tsunami : public Platform
      * @param name name of the object
      * @param intrctrl pointer to the interrupt controller
      */
-    Tsunami(const std::string &name, System *s, IntrControl *intctrl,
-            PciConfigAll *pci);
+    Tsunami(const std::string &name, System *s, IntrControl *intctrl);
 
     /**
      * Return the interrupting frequency to AlphaAccess