fs now gets to the point where it would really like a filesystem.

Time to make the ide device work

arch/alpha/system.cc:
    write the machine type and rev in the correct place
cpu/simple/cpu.cc:
    reset the packet structure every time it's reused... wow the
    simple cpu code  for talking to memory is getting horrible.
dev/alpha_console.cc:
    move the setAlphaAccess to startup() to make sure that the console
    binary is loaded
dev/tsunami_cchip.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
    fix a couple of bugs injected in the newmem fixes
mem/bus.cc:
    More verbose bus tracing
mem/packet.hh:
    Add a constructor to packet to set the result to unknown and a reset
    method in the case it's being reused
mem/vport.hh:
    don't need are own read/write methods since the base functional port
    ones call writeBlob readBlob which do the translation for us

--HG--
extra : convert_revision : 8d0e2b782bfbf13dc5c59dab1a79a084d2a7da0a

1 files changed, 4 insertions, 4 deletions

diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index b15f6fefb..81ad9a71d 100644
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -74,7 +74,7 @@ TsunamiCChip::read(Packet &pkt)
     DPRINTF(Tsunami, "read  va=%#x size=%d\n", pkt.addr, pkt.size);
 
     assert(pkt.result == Unknown);
-    assert(pkt.addr > pioAddr && pkt.addr < pioAddr + pioSize);
+    assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
 
     pkt.time = curTick + pioDelay;
     Addr regnum = (pkt.addr - pioAddr) >> 6;
@@ -179,8 +179,8 @@ TsunamiCChip::read(Packet &pkt)
       default:
         panic("invalid access size(?) for tsunami register!\n");
     }
-    DPRINTFN("Tsunami CChip: read  regnum=%#x size=%d data=%lld\n", regnum,
-            pkt.size, *data64);
+    DPRINTF(Tsunami, "Tsunami CChip: read  regnum=%#x size=%d data=%lld\n",
+            regnum, pkt.size, *data64);
 
     pkt.result = Success;
     return pioDelay;
@@ -282,7 +282,7 @@ TsunamiCChip::write(Packet &pkt)
             if(!supportedWrite)
                   panic("TSDEV_CC_MISC write not implemented\n");
 
-
+            break;
             case TSDEV_CC_AAR0:
             case TSDEV_CC_AAR1:
             case TSDEV_CC_AAR2: