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| author | Ali Saidi <saidi@eecs.umich.edu> | 2004-01-28 18:12:52 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2004-01-28 18:12:52 -0500 |
| commit | b6fba57065d42f12274e83d885a3af048e2daa78 (patch) | |
| tree | 62cc0cac418a3e2fe10df6d716e925dad04605e6 /dev/tsunami_cchip.cc | |
| parent | 3ccc0b1f968e3efaeccda65e06f862c899678312 (diff) | |
| download | gem5-b6fba57065d42f12274e83d885a3af048e2daa78.tar.xz | |
our first interrupt
cpu/exetrace.cc:
added looking for symbols at PC+4 and PC+8 thanks to gcc skiping
setting the gp where it can and jumping <func>+8
dev/console.cc:
commented out weird interrupt per nate's suggestion
dev/tsunami_cchip.cc:
moved rtc flag to correct bit
dev/tsunami_io.cc:
time interrupt will be 1024Hz and at some point be configurable by
linux
dev/tsunami_io.hh:
Timer interrupt will be 1024hz for now and in the future be
configurable by linux
--HG--
extra : convert_revision : 2fcc924c8848eb3c6166d9d517617ed193a2b89a
Diffstat (limited to 'dev/tsunami_cchip.cc')
| -rw-r--r-- | dev/tsunami_cchip.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc index 6559f3809..ffde4da98 100644 --- a/dev/tsunami_cchip.cc +++ b/dev/tsunami_cchip.cc @@ -148,10 +148,11 @@ TsunamiCChip::write(MemReqPtr req, const uint8_t *data) return No_Fault; case TSDEV_CC_MISC: //If it is the seventh bit, clear the RTC interrupt - if ((*(uint64_t*) data) & (1<<7)) { + if ((*(uint64_t*) data) & (1<<4)) { RTCInterrupting = false; tsunami->intrctrl->clear(0, TheISA::INTLEVEL_IRQ2, 0); - misc &= ~(1<<7); + DPRINTF(Tsunami, "clearing rtc interrupt\n"); + misc &= ~(1<<4); } else panic("TSDEV_CC_MISC write not implemented\n"); return No_Fault; case TSDEV_CC_AAR0: |