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authorAli Saidi <saidi@eecs.umich.edu>2004-06-10 13:30:58 -0400
committerAli Saidi <saidi@eecs.umich.edu>2004-06-10 13:30:58 -0400
commit02f69b94c540a6b116c1a71a97f16facd21a5c44 (patch)
tree7141d773d09c16f15b6785d5f6420129f7279c5f /dev/tsunami_cchip.cc
parenta20f44979afd2a77d8b699534a4029d1e35464de (diff)
downloadgem5-02f69b94c540a6b116c1a71a97f16facd21a5c44.tar.xz
Fixes for detailed boot, made cttz and ctlz instructions more compact,
and started cleaning up config files. arch/alpha/isa_desc: Made implementation of cttz and ctlz more compact base/remote_gdb.cc: Added comment about PALcode debugger accesses dev/baddev.cc: dev/baddev.hh: dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/pciconfigall.cc: dev/pciconfigall.hh: dev/tsunami_cchip.cc: dev/tsunami_cchip.hh: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: dev/tsunami_uart.cc: dev/tsunami_uart.hh: Cleaned up includes and changed device from FunctionalMemory to PioDevice for detailed boot dev/ns_gige.cc: The ethernet dev uses two BARs, and the first bars size was being set incorrectly. dev/tsunamireg.h: I don't know why we were using the superpage as the PCI memory addr. Changed and works correctly with detailed boot. --HG-- extra : convert_revision : b535e76612cb90b544305dc1aa8c5e0e774564bd
Diffstat (limited to 'dev/tsunami_cchip.cc')
-rw-r--r--dev/tsunami_cchip.cc31
1 files changed, 25 insertions, 6 deletions
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index 0700cf49a..a64f643a2 100644
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -35,21 +35,23 @@
#include <vector>
#include "base/trace.hh"
-#include "cpu/exec_context.hh"
#include "dev/console.hh"
#include "dev/tsunami_cchip.hh"
#include "dev/tsunamireg.h"
#include "dev/tsunami.hh"
-#include "cpu/intr_control.hh"
+#include "mem/bus/bus.hh"
+#include "mem/bus/pio_interface.hh"
+#include "mem/bus/pio_interface_impl.hh"
#include "mem/functional_mem/memory_control.hh"
+#include "cpu/intr_control.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
using namespace std;
TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t, Addr a,
- MemoryController *mmu)
- : FunctionalMemory(name), addr(a), tsunami(t)
+ MemoryController *mmu, HierParams *hier, Bus* bus)
+ : PioDevice(name), addr(a), tsunami(t)
{
mmu->add_child(this, Range<Addr>(addr, addr + size));
@@ -61,6 +63,12 @@ TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t, Addr a,
RTCInterrupting[i] = false;
}
+ if (bus) {
+ pioInterface = newPioInterface(name, hier, bus, this,
+ &TsunamiCChip::cacheAccess);
+ pioInterface->addAddrRange(addr, addr + size - 1);
+ }
+
drir = 0;
misc = 0;
@@ -373,6 +381,13 @@ TsunamiCChip::clearDRIR(uint32_t interrupt)
DPRINTF(Tsunami, "Spurrious clear? interrupt %d\n", interrupt);
}
+Tick
+TsunamiCChip::cacheAccess(MemReqPtr &req)
+{
+ return curTick + 1000;
+}
+
+
void
TsunamiCChip::serialize(std::ostream &os)
{
@@ -402,6 +417,8 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip)
SimObjectParam<Tsunami *> tsunami;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
+ SimObjectParam<Bus*> io_bus;
+ SimObjectParam<HierParams *> hier;
END_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip)
@@ -409,13 +426,15 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiCChip)
INIT_PARAM(tsunami, "Tsunami"),
INIT_PARAM(mmu, "Memory Controller"),
- INIT_PARAM(addr, "Device Address")
+ INIT_PARAM(addr, "Device Address"),
+ INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
END_INIT_SIM_OBJECT_PARAMS(TsunamiCChip)
CREATE_SIM_OBJECT(TsunamiCChip)
{
- return new TsunamiCChip(getInstanceName(), tsunami, addr, mmu);
+ return new TsunamiCChip(getInstanceName(), tsunami, addr, mmu, hier, io_bus);
}
REGISTER_SIM_OBJECT("TsunamiCChip", TsunamiCChip)