Add support for Tsunami with 64 processors

base/socket.cc:
    Make panic print a more worthwhile message
dev/tsunami.hh:
    Change max number of tsunami cpus to be 64
dev/tsunamireg.h:
    Add new registers and register blocks for 64 cpu tsunami

--HG--
extra : convert_revision : 3ceaaa998518ded8613bc64edc04cb9120fd3d15

1 files changed, 24 insertions, 12 deletions

diff --git a/dev/tsunami_cchip.hh b/dev/tsunami_cchip.hh
index 3269cf53a..05fafa782 100644
--- a/dev/tsunami_cchip.hh
+++ b/dev/tsunami_cchip.hh
@@ -47,7 +47,7 @@ class TsunamiCChip : public PioDevice
     Addr addr;
 
     /** The size of mappad from the above address */
-    static const Addr size = 0xfff;
+    static const Addr size = 0xfffffff;
 
   protected:
     /**
@@ -68,7 +68,6 @@ class TsunamiCChip : public PioDevice
      * One exists for each CPU, the DRIR X DIM = DIR
      */
     uint64_t dir[Tsunami::Max_CPUs];
-    bool dirInterrupting[Tsunami::Max_CPUs];
 
     /**
      * This register contains bits for each PCI interrupt
@@ -76,17 +75,11 @@ class TsunamiCChip : public PioDevice
      */
     uint64_t drir;
 
-    /**
-     * The MISC register contains the CPU we are currently on
-     * as well as bits to ack RTC and IPI interrupts.
-     */
-    uint64_t misc;
+    /** Indicator of which CPUs have an IPI interrupt */
+    uint64_t ipint;
 
-    /** Count of the number of pending IPIs on a CPU */
-    uint64_t ipiInterrupting[Tsunami::Max_CPUs];
-
-    /** Indicator of which CPUs have had an RTC interrupt */
-    bool RTCInterrupting[Tsunami::Max_CPUs];
+    /** Indicator of which CPUs have an RTC interrupt */
+    uint64_t itint;
 
   public:
     /**
@@ -138,6 +131,25 @@ class TsunamiCChip : public PioDevice
     void clearDRIR(uint32_t interrupt);
 
     /**
+     * post an ipi interrupt  to the CPU.
+     * @param ipintr the cpu number to clear(bitvector)
+     */
+    void clearIPI(uint64_t ipintr);
+
+    /**
+     * clear a timer interrupt previously posted to the CPU.
+     * @param interrupt the cpu number to clear(bitvector)
+     */
+    void clearITI(uint64_t itintr);
+
+    /**
+     * request an interrupt be posted to the CPU.
+     * @param ipreq the cpu number to interrupt(bitvector)
+     */
+    void reqIPI(uint64_t ipreq);
+
+
+    /**
      * Serialize this object to the given output stream.
      * @param os The stream to serialize to.
      */