Cleaned up and commented code. I think we are ready to merge with head.

dev/baddev.hh:
dev/pcidev.hh:
dev/tsunami.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
    Added doxygen comments
dev/pciconfigall.hh:
    Added doxygen comments. Made the hlist of devices private and provided
    members to modify the data.
dev/pcidev.cc:
    updated for change in pciconfigall
dev/tsunami_pchip.cc:
    Deleted commented out code we don't need
kern/linux/linux_syscalls.cc:
    Simplified the number -> name conversion.
kern/linux/linux_syscalls.hh:
    Removed StandardNumber and replaced with Number.
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
    LinuxSkipIdeDelay50msEvent was simply the same as the SkipFunc event,
    so I removed it. Same with with LinuxSkipFuncEvent.

--HG--
extra : convert_revision : 1508c335f87d90373f5772f3a0407ea13e858d7e

1 files changed, 55 insertions, 0 deletions

diff --git a/dev/tsunami_cchip.hh b/dev/tsunami_cchip.hh
index adb05a572..381fb58f1 100644
--- a/dev/tsunami_cchip.hh
+++ b/dev/tsunami_cchip.hh
@@ -42,7 +42,10 @@
 class TsunamiCChip : public FunctionalMemory
 {
   private:
+    /** The base address of this device */
     Addr addr;
+
+    /** The size of mappad from the above address */
     static const Addr size = 0xfff;
 
   protected:
@@ -72,23 +75,75 @@ class TsunamiCChip : public FunctionalMemory
      */
     uint64_t drir;
 
+    /**
+     * The MISC register contains the CPU we are currently on
+     * as well as bits to ack RTC and IPI interrupts.
+     */
     uint64_t misc;
 
+    /** Count of the number of pending IPIs on a CPU */
     uint64_t ipiInterrupting[Tsunami::Max_CPUs];
+
+    /** Indicator of which CPUs have had an RTC interrupt */
     bool RTCInterrupting[Tsunami::Max_CPUs];
 
   public:
+    /**
+     * Initialize the Tsunami CChip by setting all of the
+     * device register to 0.
+     * @param name name of this device.
+     * @param t pointer back to the Tsunami object that we belong to.
+     * @param a address we are mapped at.
+     * @param mmu pointer to the memory controller that sends us events.
+     */
     TsunamiCChip(const std::string &name, Tsunami *t, Addr a,
                  MemoryController *mmu);
 
+    /**
+      * Process a read to the CChip.
+      * @param req Contains the address to read from.
+      * @param data A pointer to write the read data to.
+      * @return The fault condition of the access.
+      */
     virtual Fault read(MemReqPtr &req, uint8_t *data);
+
+
+    /**
+      * Process a write to the CChip.
+      * @param req Contains the address to write to.
+      * @param data The data to write.
+      * @return The fault condition of the access.
+      */
     virtual Fault write(MemReqPtr &req, const uint8_t *data);
 
+    /**
+     * post an RTC interrupt to the CPU
+     */
     void postRTC();
+
+    /**
+     * post an interrupt to the CPU.
+     * @param interrupt the interrupt number to post (0-64)
+     */
     void postDRIR(uint32_t interrupt);
+
+    /**
+     * clear an interrupt previously posted to the CPU.
+     * @param interrupt the interrupt number to post (0-64)
+     */
     void clearDRIR(uint32_t interrupt);
 
+    /**
+     * Serialize this object to the given output stream.
+     * @param os The stream to serialize to.
+     */
     virtual void serialize(std::ostream &os);
+
+    /**
+     * Reconstruct the state of this object from a checkpoint.
+     * @param cp The checkpoint use.
+     * @param section The section name of this object
+     */
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 };