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| author | Ron Dreslinski <rdreslin@umich.edu> | 2004-02-20 14:28:59 -0500 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2004-02-20 14:28:59 -0500 |
| commit | db940dd0b08f020326c20bc983af5d3483656491 (patch) | |
| tree | 8c05a6a403b172e9d2f240a23ce085a90b84557c /dev/tsunami_cchip.hh | |
| parent | d4637757f855c14ebecfa7e4bea93c86143e5e45 (diff) | |
| download | gem5-db940dd0b08f020326c20bc983af5d3483656491.tar.xz | |
Add support for IPI's and extend RTC to interrupt all Processors
dev/tsunami_cchip.cc:
Add support for IPI, making changes to read/write to MISC register
Particularly the IPREQ, IPINTR, and ITINTR subfields
dev/tsunami_cchip.hh:
Make an array to keep track of the number of outstanding IPI's,
Extend RTC to interrupt all processors, not just cpu0
dev/tsunami_io.cc:
Extend RTC to interrupt all present proccessors, not just cpu0
--HG--
extra : convert_revision : 0715cbf0abb06002c0fb0b05ef369304cdf75001
Diffstat (limited to 'dev/tsunami_cchip.hh')
| -rw-r--r-- | dev/tsunami_cchip.hh | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/dev/tsunami_cchip.hh b/dev/tsunami_cchip.hh index 75214c527..a816e723e 100644 --- a/dev/tsunami_cchip.hh +++ b/dev/tsunami_cchip.hh @@ -71,6 +71,7 @@ class TsunamiCChip : public FunctionalMemory * that can occur. */ uint64_t drir; + uint64_t ipiInterrupting[Tsunami::Max_CPUs]; public: TsunamiCChip(const std::string &name, Tsunami *t, Addr a, @@ -86,7 +87,7 @@ class TsunamiCChip : public FunctionalMemory virtual void unserialize(Checkpoint *cp, const std::string §ion); uint64_t misc; - bool RTCInterrupting; + bool RTCInterrupting[Tsunami::Max_CPUs]; }; #endif // __TSUNAMI_CCHIP_HH__ |