Rewrote interrupt code to handle masking correctly and changed every

interrupt to use a different subnumber since both devices could
interrupt at the same time and we don't want to loose one.

dev/tsunami_cchip.cc:
    rewrote interrupt code to handle interrupt mask clearing correctly
dev/tsunami_cchip.hh:
    changed (post/clear)DRIR to use a interrupt number rather than a vecotr
dev/tsunami_io.cc:
    updated for new post/clearDRIR calls

--HG--
extra : convert_revision : 5b39f5e15a66d5eb6e689e6ece62f99b5fa735ab

1 files changed, 3 insertions, 3 deletions

diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc
index ccf0bc2da..fa87a72c4 100644
--- a/dev/tsunami_io.cc
+++ b/dev/tsunami_io.cc
@@ -237,7 +237,7 @@ TsunamiIO::write(MemReqPtr &req, const uint8_t *data)
             mask1 = *(uint8_t*)data;
             if ((picr & mask1) && !picInterrupting) {
                 picInterrupting = true;
-                tsunami->cchip->postDRIR(uint64_t(1) << 55);
+                tsunami->cchip->postDRIR(55);
                 DPRINTF(Tsunami, "posting pic interrupt to cchip\n");
             }
             return No_Fault;
@@ -326,7 +326,7 @@ TsunamiIO::postPIC(uint8_t bitvector)
     picr |= bitvector;
     if ((picr & mask1) && !picInterrupting) {
         picInterrupting = true;
-        tsunami->cchip->postDRIR(uint64_t(1) << 55);
+        tsunami->cchip->postDRIR(55);
         DPRINTF(Tsunami, "posting pic interrupt to cchip\n");
     }
 }
@@ -338,7 +338,7 @@ TsunamiIO::clearPIC(uint8_t bitvector)
     picr &= ~bitvector;
     if (!(picr & mask1)) {
         picInterrupting = false;
-        tsunami->cchip->clearDRIR(uint64_t(1) << 55);
+        tsunami->cchip->clearDRIR(55);
         DPRINTF(Tsunami, "clearing pic interrupt to cchip\n");
     }
 }