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author | Ron Dreslinski <rdreslin@umich.edu> | 2004-01-28 19:18:29 -0500 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2004-01-28 19:18:29 -0500 |
commit | d41c904402fb9943e9a17ccbdedfaf8f26633e79 (patch) | |
tree | 5b2da11fe4a17f84099782b7f30e5caff5bc0571 /dev/tsunami_io.cc | |
parent | b6fba57065d42f12274e83d885a3af048e2daa78 (diff) | |
download | gem5-d41c904402fb9943e9a17ccbdedfaf8f26633e79.tar.xz |
Add support for PIC interrupts in IO, and DIRx interrupts in CChip
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
Add Interrupt capabilities for DIRx, added postDRIR and clearDRIR
functions
dev/tsunami_io.cc:
Add PIC interrupts, and post/clearPIC functions
dev/tsunami_io.hh:
Add support for PIC interrupts, added post/clearPIC functions
--HG--
extra : convert_revision : b705568670b157c1a4496c365226526fa96e21e0
Diffstat (limited to 'dev/tsunami_io.cc')
-rw-r--r-- | dev/tsunami_io.cc | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc index 87f997e9e..cfa91a67d 100644 --- a/dev/tsunami_io.cc +++ b/dev/tsunami_io.cc @@ -109,6 +109,8 @@ TsunamiIO::TsunamiIO(const string &name, Tsunami *t, time_t init_time, timerData = 0; set_time(init_time == 0 ? time(NULL) : init_time); uip = 1; + picr = 0; + picInterrupting = false; } void @@ -202,9 +204,15 @@ TsunamiIO::write(MemReqPtr req, const uint8_t *data) switch(daddr) { case TSDEV_PIC1_MASK: mask1 = *(uint8_t*)data; + if ((picr & mask1) && !picInterrupting) { + picInterrupting = true; + tsunami->cchip->postDRIR(uint64_t(1) << 55); + DPRINTF(Tsunami, "posting pic interrupt to cchip\n"); + } return No_Fault; case TSDEV_PIC2_MASK: mask2 = *(uint8_t*)data; + //PIC2 Not implemented to interrupt return No_Fault; case TSDEV_DMA1_RESET: return No_Fault; @@ -280,6 +288,30 @@ TsunamiIO::write(MemReqPtr req, const uint8_t *data) } void +TsunamiIO::postPIC(uint8_t bitvector) +{ + //PIC2 Is not implemented, because nothing of interest there + picr |= bitvector; + if ((picr & mask1) && !picInterrupting) { + picInterrupting = true; + tsunami->cchip->postDRIR(uint64_t(1) << 55); + DPRINTF(Tsunami, "posting pic interrupt to cchip\n"); + } +} + +void +TsunamiIO::clearPIC(uint8_t bitvector) +{ + //PIC2 Is not implemented, because nothing of interest there + picr &= ~bitvector; + if (!(picr & mask1)) { + picInterrupting = false; + tsunami->cchip->clearDRIR(uint64_t(1) << 55); + DPRINTF(Tsunami, "clearing pic interrupt to cchip\n"); + } +} + +void TsunamiIO::serialize(std::ostream &os) { // code should be written |