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authorBenjamin Nash <benash@umich.edu>2005-07-28 13:16:45 -0400
committerBenjamin Nash <benash@umich.edu>2005-07-28 13:16:45 -0400
commita115249eb07f6e3c9666bf408e214fcd38a665fb (patch)
tree21ea53a2698dc89fdc7f26fc81d45db6d69fbe4f /dev/tsunami_io.cc
parent648c3beb1d4735e423e77f5189c27c28e5b34493 (diff)
parent74fd4f68c5a7df2efba11497ba1ab5ab62b0b1bf (diff)
downloadgem5-a115249eb07f6e3c9666bf408e214fcd38a665fb.tar.xz
Merge zed.eecs.umich.edu:/.automount/fox/y/mserrano/m5_new/m5
into zed.eecs.umich.edu:/z/benash/bk/m5 SConscript: dev/ide_disk.hh: Formatting. dev/ide_ctrl.cc: Endianness dev/ide_disk.cc: dev/pcidev.cc: dev/tsunami_io.cc: dev/uart8250.cc: Clean up code. --HG-- extra : convert_revision : cb554f0e3a701371d2106cd7e11a4a22f773acc2
Diffstat (limited to 'dev/tsunami_io.cc')
-rw-r--r--dev/tsunami_io.cc62
1 files changed, 31 insertions, 31 deletions
diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc
index 82fe40e0a..f9dcbb8e0 100644
--- a/dev/tsunami_io.cc
+++ b/dev/tsunami_io.cc
@@ -52,14 +52,11 @@ using namespace std;
#define UNIX_YEAR_OFFSET 52
-struct tm TsunamiIO::tm = { 0 };
-
// Timer Event for Periodic interrupt of RTC
TsunamiIO::RTCEvent::RTCEvent(Tsunami* t, Tick i)
: Event(&mainEventQueue), tsunami(t), interval(i)
{
DPRINTF(MC146818, "RTC Event Initilizing\n");
- intr_count = 0;
schedule(curTick + interval);
}
@@ -70,11 +67,6 @@ TsunamiIO::RTCEvent::process()
schedule(curTick + interval);
//Actually interrupt the processor here
tsunami->cchip->postRTC();
-
- if (intr_count == 1023)
- tm.tm_sec = (tm.tm_sec + 1) % 60;
-
- intr_count = (intr_count + 1) % 1024;
}
const char *
@@ -98,6 +90,11 @@ TsunamiIO::RTCEvent::unserialize(Checkpoint *cp, const std::string &section)
reschedule(time);
}
+void
+TsunamiIO::RTCEvent::scheduleIntr()
+{
+ schedule(curTick + interval);
+}
// Timer Event for PIT Timers
TsunamiIO::ClockEvent::ClockEvent()
@@ -125,10 +122,8 @@ TsunamiIO::ClockEvent::process()
DPRINTF(Tsunami, "Timer Interrupt\n");
if (mode == 0)
status = 0x20; // set bit that linux is looking for
- else
- schedule(curTick + interval);
-
- current_count--; //decrement count
+ else if (mode == 2)
+ schedule(curTick + current_count*interval);
}
void
@@ -301,12 +296,12 @@ TsunamiIO::read(MemReqPtr &req, uint8_t *data)
case TSDEV_RTC_DATA:
switch(RTCAddress) {
case RTC_CNTRL_REGA:
- *(uint8_t*)data = uip << 7 | 0x26;
+ *(uint8_t*)data = uip << 7 | RTCA_32768HZ | RTCA_1024HZ;
uip = !uip;
return No_Fault;
case RTC_CNTRL_REGB:
// DM and 24/12 and UIE
- *(uint8_t*)data = 0x46;
+ *(uint8_t*)data = RTCB_PRDC_IE | RTCB_BIN | RTCB_24HR;
return No_Fault;
case RTC_CNTRL_REGC:
// If we want to support RTC user access in linux
@@ -331,7 +326,7 @@ TsunamiIO::read(MemReqPtr &req, uint8_t *data)
*(uint8_t *)data = tm.tm_hour;
return No_Fault;
case RTC_DOW:
- *(uint8_t *)data = tm.tm_wday;
+ *(uint8_t *)data = tm.tm_wday + 1;
return No_Fault;
case RTC_DOM:
*(uint8_t *)data = tm.tm_mday;
@@ -340,20 +335,11 @@ TsunamiIO::read(MemReqPtr &req, uint8_t *data)
*(uint8_t *)data = tm.tm_mon + 1;
return No_Fault;
case RTC_YEAR:
- *(uint8_t *)data = tm.tm_year - UNIX_YEAR_OFFSET;
+ *(uint8_t *)data = tm.tm_year;
return No_Fault;
default:
panic("Unknown RTC Address\n");
}
-
- /* Added for keyboard reads */
- case TSDEV_KBD:
- *(uint8_t *)data = 0x00;
- return No_Fault;
- /* Added for ATA PCI DMA */
- case ATA_PCI_DMA:
- *(uint8_t *)data = 0x00;
- return No_Fault;
default:
panic("I/O Read - va%#x size %d\n", req->vaddr, req->size);
}
@@ -447,10 +433,10 @@ TsunamiIO::write(MemReqPtr &req, const uint8_t *data)
switch(*(uint8_t*)data >> 6) {
case 0:
timer0.LatchCount();
- break;
+ return No_Fault;
case 2:
timer2.LatchCount();
- break;
+ return No_Fault;
default:
panic("Read Back Command not implemented\n");
}
@@ -488,9 +474,10 @@ TsunamiIO::write(MemReqPtr &req, const uint8_t *data)
/* two writes before we actually start the Timer
so I set a flag in the timerData */
if(timerData & 0x1000) {
- timerData &= 0x1000;
+ timerData &= ~0x1000;
timerData += *(uint8_t*)data << 8;
timer0.Program(timerData);
+ timerData = 0;
} else {
timerData = *(uint8_t*)data;
timerData |= 0x1000;
@@ -504,12 +491,26 @@ TsunamiIO::write(MemReqPtr &req, const uint8_t *data)
case TSDEV_RTC_DATA:
switch(RTCAddress) {
case RTC_CNTRL_REGA:
+ if (*data != (RTCA_32768HZ | RTCA_1024HZ))
+ panic("Unimplemented RTC register A value write!\n");
return No_Fault;
case RTC_CNTRL_REGB:
+ if ((*data & ~(RTCB_PRDC_IE | RTCB_SQWE)) != (RTCB_BIN | RTCB_24HR))
+ panic("Write to RTC reg B bits that are not implemented!\n");
+
+ if (*data & RTCB_PRDC_IE) {
+ if (!rtc.scheduled())
+ rtc.scheduleIntr();
+ } else {
+ if (rtc.scheduled())
+ rtc.deschedule();
+ }
return No_Fault;
case RTC_CNTRL_REGC:
+ panic("Write to RTC reg C not implemented!\n");
return No_Fault;
case RTC_CNTRL_REGD:
+ panic("Write to RTC reg D not implemented!\n");
return No_Fault;
case RTC_SEC:
tm.tm_sec = *(uint8_t *)data;
@@ -527,12 +528,11 @@ TsunamiIO::write(MemReqPtr &req, const uint8_t *data)
tm.tm_mday = *(uint8_t *)data;
return No_Fault;
case RTC_MON:
- tm.tm_mon = *(uint8_t *)data - 1;
+ tm.tm_mon = *(uint8_t *)data;
return No_Fault;
case RTC_YEAR:
- tm.tm_year = *(uint8_t *)data + UNIX_YEAR_OFFSET;
+ tm.tm_year = *(uint8_t *)data;
return No_Fault;
- //panic("RTC Write not implmented (rtc.o won't work)\n");
}
default:
panic("I/O Write - va%#x size %d\n", req->vaddr, req->size);