Fixes for detailed boot, made cttz and ctlz instructions more compact,

and started cleaning up config files.

arch/alpha/isa_desc:
    Made implementation of cttz and ctlz more compact
base/remote_gdb.cc:
    Added comment about PALcode debugger accesses
dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
    Cleaned up includes and changed device from FunctionalMemory to
    PioDevice for detailed boot
dev/ns_gige.cc:
    The ethernet dev uses two BARs, and the first bars size was being set
    incorrectly.
dev/tsunamireg.h:
    I don't know why we were using the superpage as the PCI memory addr.
    Changed and works correctly with detailed boot.

--HG--
extra : convert_revision : b535e76612cb90b544305dc1aa8c5e0e774564bd

1 files changed, 25 insertions, 9 deletions

diff --git a/dev/tsunami_pchip.cc b/dev/tsunami_pchip.cc
index e65b235bd..b1346bb1a 100644
--- a/dev/tsunami_pchip.cc
+++ b/dev/tsunami_pchip.cc
@@ -35,14 +35,12 @@
 #include <vector>
 
 #include "base/trace.hh"
-#include "cpu/exec_context.hh"
-#include "dev/console.hh"
-#include "dev/etherdev.hh"
-#include "dev/scsi_ctrl.hh"
-#include "dev/tlaser_clock.hh"
 #include "dev/tsunami_pchip.hh"
 #include "dev/tsunamireg.h"
 #include "dev/tsunami.hh"
+#include "mem/bus/bus.hh"
+#include "mem/bus/pio_interface.hh"
+#include "mem/bus/pio_interface_impl.hh"
 #include "mem/functional_mem/memory_control.hh"
 #include "mem/functional_mem/physical_memory.hh"
 #include "sim/builder.hh"
@@ -51,8 +49,9 @@
 using namespace std;
 
 TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t, Addr a,
-                           MemoryController *mmu)
-    : FunctionalMemory(name), addr(a), tsunami(t)
+                           MemoryController *mmu, HierParams *hier,
+                           Bus *bus)
+    : PioDevice(name), addr(a), tsunami(t)
 {
     mmu->add_child(this, Range<Addr>(addr, addr + size));
 
@@ -62,6 +61,13 @@ TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t, Addr a,
         tba[i] = 0;
     }
 
+    if (bus) {
+        pioInterface = newPioInterface(name, hier, bus, this,
+                                      &TsunamiPChip::cacheAccess);
+        pioInterface->addAddrRange(addr, addr + size - 1);
+    }
+
+
     // initialize pchip control register
     pctl = (ULL(0x1) << 20) | (ULL(0x1) << 32) | (ULL(0x2) << 36);
 
@@ -342,11 +348,19 @@ TsunamiPChip::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_ARRAY(tba, 4);
 }
 
+Tick
+TsunamiPChip::cacheAccess(MemReqPtr &req)
+{
+    return curTick + 1000;
+}
+
 BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiPChip)
 
     SimObjectParam<Tsunami *> tsunami;
     SimObjectParam<MemoryController *> mmu;
     Param<Addr> addr;
+    SimObjectParam<Bus*> io_bus;
+    SimObjectParam<HierParams *> hier;
 
 END_DECLARE_SIM_OBJECT_PARAMS(TsunamiPChip)
 
@@ -354,13 +368,15 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiPChip)
 
     INIT_PARAM(tsunami, "Tsunami"),
     INIT_PARAM(mmu, "Memory Controller"),
-    INIT_PARAM(addr, "Device Address")
+    INIT_PARAM(addr, "Device Address"),
+    INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+    INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
 
 END_INIT_SIM_OBJECT_PARAMS(TsunamiPChip)
 
 CREATE_SIM_OBJECT(TsunamiPChip)
 {
-    return new TsunamiPChip(getInstanceName(), tsunami, addr, mmu);
+    return new TsunamiPChip(getInstanceName(), tsunami, addr, mmu, hier, io_bus);
 }
 
 REGISTER_SIM_OBJECT("TsunamiPChip", TsunamiPChip)