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authorAli Saidi <saidi@eecs.umich.edu>2006-04-24 19:31:50 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-04-24 19:31:50 -0400
commit8f8d09538f58d2e56d7f61b595e64bd06cce8484 (patch)
tree1f11c7191ddfdf7d061764a3746f3c030d6b5271 /dev/tsunami_pchip.cc
parent6dc3b2fa395601852cb3efff302229907b1759f8 (diff)
downloadgem5-8f8d09538f58d2e56d7f61b595e64bd06cce8484.tar.xz
Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working
after merge from head. Checkpointing may need some work now. Endian-happiness still not complete. SConscript: add all devices back into make file base/inet.hh: dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/etherpkt.cc: dev/etherpkt.hh: dev/ethertap.cc: dev/ethertap.hh: dev/pktfifo.cc: dev/pktfifo.hh: rename PacketPtr EthPacketPtr so it doesn't conflict with the PacketPtr type in the memory system configs/test/fs.py: add nics to fs.py cpu/cpu_exec_context.cc: remove this check, as it's not valid. We may want to add something else back in to make sure that no one can delete the static virtual ports in the exec context cpu/simple/cpu.cc: cpu/simple/cpu.hh: dev/alpha_console.cc: dev/ide_ctrl.cc: use new methods for accessing packet data dev/ide_disk.cc: add some more dprintfs dev/io_device.cc: delete packets when we are done with them. Update for new packet methods to access data dev/isa_fake.cc: dev/pciconfigall.cc: dev/tsunami_cchip.cc: dev/tsunami_io.cc: dev/tsunami_pchip.cc: dev/uart8250.cc: dev/uart8250.hh: mem/physical.cc: mem/port.cc: dUpdate for new packet methods to access data dev/ns_gige.cc: Update for new memory system dev/ns_gige.hh: python/m5/objects/Ethernet.py: update for new memory system dev/sinic.cc: dev/sinic.hh: Update for new memory system. Untested as need to merge in head because of kernel driver differences between versions mem/packet.hh: Add methods to access data instead of accessing it directly. --HG-- extra : convert_revision : 223f43876afd404e68337270cd9a5e44d0bf553e
Diffstat (limited to 'dev/tsunami_pchip.cc')
-rw-r--r--dev/tsunami_pchip.cc69
1 files changed, 32 insertions, 37 deletions
diff --git a/dev/tsunami_pchip.cc b/dev/tsunami_pchip.cc
index 66144b816..05b480cb8 100644
--- a/dev/tsunami_pchip.cc
+++ b/dev/tsunami_pchip.cc
@@ -70,75 +70,71 @@ TsunamiPChip::read(Packet &pkt)
assert(pkt.result == Unknown);
assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
+
pkt.time = curTick + pioDelay;
+ pkt.allocate();
Addr daddr = (pkt.addr - pioAddr) >> 6;;
+ assert(pkt.size == sizeof(uint64_t));
- uint64_t *data64;
-
- if (!pkt.data) {
- data64 = new uint64_t;
- pkt.data = (uint8_t*)data64;
- } else
- data64 = (uint64_t*)pkt.data;
DPRINTF(Tsunami, "read va=%#x size=%d\n", pkt.addr, pkt.size);
switch(daddr) {
case TSDEV_PC_WSBA0:
- *data64 = wsba[0];
+ pkt.set(wsba[0]);
break;
case TSDEV_PC_WSBA1:
- *data64 = wsba[1];
+ pkt.set(wsba[1]);
break;
case TSDEV_PC_WSBA2:
- *data64 = wsba[2];
+ pkt.set(wsba[2]);
break;
case TSDEV_PC_WSBA3:
- *data64 = wsba[3];
+ pkt.set(wsba[3]);
break;
case TSDEV_PC_WSM0:
- *data64 = wsm[0];
+ pkt.set(wsm[0]);
break;
case TSDEV_PC_WSM1:
- *data64 = wsm[1];
+ pkt.set(wsm[1]);
break;
case TSDEV_PC_WSM2:
- *data64 = wsm[2];
+ pkt.set(wsm[2]);
break;
case TSDEV_PC_WSM3:
- *data64 = wsm[3];
+ pkt.set(wsm[3]);
break;
case TSDEV_PC_TBA0:
- *data64 = tba[0];
+ pkt.set(tba[0]);
break;
case TSDEV_PC_TBA1:
- *data64 = tba[1];
+ pkt.set(tba[1]);
break;
case TSDEV_PC_TBA2:
- *data64 = tba[2];
+ pkt.set(tba[2]);
break;
case TSDEV_PC_TBA3:
- *data64 = tba[3];
+ pkt.set(tba[3]);
break;
case TSDEV_PC_PCTL:
- *data64 = pctl;
+ pkt.set(pctl);
break;
case TSDEV_PC_PLAT:
panic("PC_PLAT not implemented\n");
case TSDEV_PC_RES:
panic("PC_RES not implemented\n");
case TSDEV_PC_PERROR:
- *data64 = 0x00;
+ pkt.set((uint64_t)0x00);
break;
case TSDEV_PC_PERRMASK:
- *data64 = 0x00;
+ pkt.set((uint64_t)0x00);
break;
case TSDEV_PC_PERRSET:
panic("PC_PERRSET not implemented\n");
case TSDEV_PC_TLBIV:
panic("PC_TLBIV not implemented\n");
case TSDEV_PC_TLBIA:
- *data64 = 0x00; // shouldn't be readable, but linux
+ pkt.set((uint64_t)0x00); // shouldn't be readable, but linux
break;
case TSDEV_PC_PMONCTL:
panic("PC_PMONCTL not implemented\n");
@@ -161,50 +157,49 @@ TsunamiPChip::write(Packet &pkt)
assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
Addr daddr = (pkt.addr - pioAddr) >> 6;
- uint64_t data64 = *(uint64_t *)pkt.data;
assert(pkt.size == sizeof(uint64_t));
DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt.addr, pkt.size);
switch(daddr) {
case TSDEV_PC_WSBA0:
- wsba[0] = data64;
+ wsba[0] = pkt.get<uint64_t>();
break;
case TSDEV_PC_WSBA1:
- wsba[1] = data64;
+ wsba[1] = pkt.get<uint64_t>();
break;
case TSDEV_PC_WSBA2:
- wsba[2] = data64;
+ wsba[2] = pkt.get<uint64_t>();
break;
case TSDEV_PC_WSBA3:
- wsba[3] = data64;
+ wsba[3] = pkt.get<uint64_t>();
break;
case TSDEV_PC_WSM0:
- wsm[0] = data64;
+ wsm[0] = pkt.get<uint64_t>();
break;
case TSDEV_PC_WSM1:
- wsm[1] = data64;
+ wsm[1] = pkt.get<uint64_t>();
break;
case TSDEV_PC_WSM2:
- wsm[2] = data64;
+ wsm[2] = pkt.get<uint64_t>();
break;
case TSDEV_PC_WSM3:
- wsm[3] = data64;
+ wsm[3] = pkt.get<uint64_t>();
break;
case TSDEV_PC_TBA0:
- tba[0] = data64;
+ tba[0] = pkt.get<uint64_t>();
break;
case TSDEV_PC_TBA1:
- tba[1] = data64;
+ tba[1] = pkt.get<uint64_t>();
break;
case TSDEV_PC_TBA2:
- tba[2] = data64;
+ tba[2] = pkt.get<uint64_t>();
break;
case TSDEV_PC_TBA3:
- tba[3] = data64;
+ tba[3] = pkt.get<uint64_t>();
break;
case TSDEV_PC_PCTL:
- pctl = data64;
+ pctl = pkt.get<uint64_t>();
break;
case TSDEV_PC_PLAT:
panic("PC_PLAT not implemented\n");